Enhancement of drain soft-breakdown strength to 1.1 MV/cm for hydrogen-terminated diamond MOSFETs by mitigating hydrogen-induced defects

At a Glance

Metadata	Details
Publication Date	2025-10-20
Journal	Applied Physics Letters
Authors	Yongxin Duan, Nana Gao, Xinxin Yu, Shuman Mao, Yuechan Kong
Institutions	Huzhou University, University of Electronic Science and Technology of China
Analysis	Full AI Review Included

Technical Documentation & Analysis: H-Diamond MOSFET Reliability

Executive Summary

This research demonstrates a critical advancement in diamond power electronics reliability by achieving a record drain soft-breakdown strength of 1.1 MV/cm in hydrogen-terminated diamond (H-diamond) MOSFETs.

Record Achievement: A drain soft-breakdown strength of 1.1 MV/cm was achieved, representing a 4.75x improvement over devices processed at higher temperatures (450 °C).
Mechanism Identified: The enhancement is directly linked to the mitigation of “hydrogen-induced defects” (H₂ bubbling) that occur during low-temperature heat treatment (<500 °C).
Material Requirement: Success relies on ultra-high purity Single Crystal Diamond (SCD) substrates (N < 1 ppm, B < 1 ppb) with an ultra-smooth (001) surface (Ra ≈ 1 nm).
Process Optimization: The critical factor was the low-temperature deposition of the Al₂O₃ gate oxide (150 °C via ALD), which preserves the long-range ordering of the H-diamond surface lattice.
Application Impact: These findings are crucial for improving the power, reliability, and long-term stability of H-diamond devices targeting high-frequency and high-power applications.
6CCVD Value Proposition: 6CCVD specializes in providing the necessary high-purity, precision-polished SCD substrates and custom metalization required to replicate and scale this high-performance device architecture.

Technical Specifications

Data extracted from Appl. Phys. Lett. 127, 163501 (2025).

Parameter	Value	Unit	Context
Record Drain Soft-Breakdown Strength (E_{br_s})	1.1	MV/cm	Achieved with Al₂O₃ deposited at 150 °C
Breakdown Voltage (V_{DS,br_s})	-38	V	150 °C device
Maximum Drain Current Density (I_D,max)	201	mA/mm	150 °C device at V_GS = -2 V
On-Resistance (R_on)	53	Ωµm	150 °C device at V_GS = -2 V
Al₂O₃ Gate Oxide Thickness	20	nm	Deposited by Atomic Layer Deposition (ALD)
Substrate Material	SCD (001)	N/A	Single Crystal Diamond
Nitrogen Impurity Content (N)	< 1	ppm	High Purity Substrate Requirement
Boron Impurity Content (B)	< 1	ppb	High Purity Substrate Requirement
Surface Roughness (Ra)	≈ 1	nm	After polishing, prior to H-termination
Gate Length (L_G)	0.35	µm	Device geometry
Gate-Drain Spacing (L_GD)	2	µm	Device geometry

Key Methodologies

The following steps outline the critical material preparation and processing parameters used to achieve the enhanced breakdown strength:

Substrate Selection: High-purity Single Crystal Diamond (SCD) with a (001) surface plane was selected, characterized by ultra-low impurity levels (N < 1 ppm, B < 1 ppb).
Surface Preparation: The SCD surface was polished to an ultra-smooth finish (Ra ≈ 1 nm).
Chemical Cleaning: Samples were cleaned in a hot acid mixture (HNO₃:H₂SO₄ at 250 °C) followed by standard solvent and de-ionized water cleaning to remove non-diamond phases.
Hydrogen Termination (H-diamond): The polished diamond surface was exposed to hydrogen plasma using a Microwave Plasma Chemical Vapor Deposition (MPCVD) system.
Thermal Treatment/Gate Oxide Deposition: Two comparative thermal treatments were performed for 1 hour in an N₂ atmosphere, coinciding with the Al₂O₃ deposition temperature:
- High Performance: 150 °C (Mitigates H-induced defects).
- Low Performance: 450 °C (Exacerbates H-induced defects).
Gate Oxide: 20 nm Al₂O₃ was deposited via Atomic Layer Deposition (ALD).
Device Fabrication: Standard lithography and metalization steps were used to define the MOSFET structure (L_G = 0.35 µm, L_GD = 2 µm).
Defect Analysis: Grazing Incidence X-ray Diffraction (GIXRD) confirmed that the 450 °C treatment severely degraded the long-range ordering of the H-diamond surface lattice, correlating directly with poor breakdown performance.

6CCVD Solutions & Capabilities

This research highlights the absolute necessity of high-quality, defect-free SCD substrates for achieving reliable diamond power devices. 6CCVD is uniquely positioned to supply the materials and customization services required to replicate and scale this high-performance H-diamond MOSFET technology.

Applicable Materials

Research Requirement	6CCVD Material Recommendation	Technical Rationale
Ultra-High Purity SCD (001)	Optical Grade Single Crystal Diamond (SCD)	Guaranteed N < 1 ppm purity ensures minimal native defects, which is critical for stable H-termination and preventing lattice strain that leads to H₂ bubbling.
High-Conductivity Channel	Hydrogen-Terminated SCD	We supply SCD wafers ready for immediate H-termination processing, enabling the formation of the necessary 2DHG (two-dimensional hole gas) channel.
Potential for P-Type Doping	Boron-Doped Diamond (BDD)	For future device architectures requiring stable bulk conductivity or integrated resistors, 6CCVD offers BDD films up to 500 µm thick.

Customization Potential

The success of this MOSFET relies on precise material dimensions and surface quality. 6CCVD offers comprehensive customization services that exceed the requirements of this study:

Customization Service	Research Relevance	6CCVD Capability
Precision Polishing	Required Ra ≈ 1 nm surface finish.	Guaranteed Ra < 1 nm on SCD wafers, minimizing surface defects that act as nucleation sites for hydrogen bubbling during processing.
Custom Dimensions	Need for specific device geometries (L_G, L_GD).	We supply SCD plates/wafers up to 125mm in diameter, and offer custom laser cutting and shaping to meet specific lithography requirements (e.g., L_G = 0.35 µm).
Metalization	Need for Source/Drain/Gate contacts.	Internal Metalization Capability: We apply custom metal stacks (e.g., Ti/Pt/Au, W/Au, etc.) directly to the diamond surface, ensuring optimal adhesion and low contact resistance for high-power operation.
Thickness Control	SCD Substrates and Active Layers.	SCD thickness control from 0.1 µm up to 500 µm for active layers, and substrates up to 10 mm thick for superior thermal management.

Engineering Support

The mitigation of hydrogen-induced defects is a complex surface science challenge. 6CCVD’s in-house PhD team specializes in MPCVD growth and surface engineering of diamond materials. We can assist researchers and engineers with:

Material Selection: Guiding the choice between SCD and PCD based on required power density and cost targets for similar H-diamond MOSFET projects.
Surface Optimization: Consulting on pre-processing steps (polishing, cleaning) to ensure the diamond surface is optimally prepared for low-temperature ALD or other gate oxide deposition techniques.
Process Integration: Providing technical data on how specific metalization schemes (e.g., Ti/Pt/Au) interact with H-terminated diamond surfaces under thermal stress.

For custom specifications or material consultation, visit 6ccvd.com or contact our engineering team directly.

View Original Abstract

Diamond surface quality is critical to improve the power and reliability for the hydrogen-terminated diamond (H-diamond) metal-oxide-semiconductor field-effect transistors (MOSFETs). In this Letter, significant surface microdefects were identified in the H-diamond after heat treatment at less than 500 °C. These microdefects may be caused by thermal bubbling of free hydrogen introduced during the diamond hydrogenation process and are, therefore, referred to as hydrogen-induced defects in this paper. Based on the peak intensity of the grazing incidence x-ray diffraction spectra, the long-range ordering of the H-diamond surface lattice degrades with the heat treatment temperature. To explain the effect of these hydrogen-induced defects on the drain breakdown of H-diamond MOSFETs, a critical electric field model considering hydrogen bubbling effect is proposed. It indicates that mitigation of hydrogen-induced defects would improve the long-range ordering of H-diamond surface lattice and, thus, increase the H-diamond breakdown strength. Next, two kinds of Al2O3/H-diamond MOSFETs with the same device structure are fabricated by depositing Al2O3 at 150 and 450 °C, respectively. It is verified that the H-diamond MOSFET with Al2O3 deposited at 150 °C exhibits a drain soft-breakdown strength 4.75 times greater than that of the device with Al2O3 deposited at 450 °C. By mitigating the hydrogen-induced defects in the H-diamond surface, a record drain soft-breakdown strength of 1.1 MV/cm is reached for the Al2O3/H-diamond MOSFET. These results would be helpful in improving the power and reliability of H-diamond devices.

Tech Support

Original Source

DOI: https://doi.org/10.1063/5.0255922

References

2010 - High breakdown voltage Schottky diodes synthesized on p-type CVD diamond layer [Crossref]
2006 - Development of single-crystal CVD-diamond detectors for spectroscopy and timing [Crossref]
2001 - Thermal conductivity measurements on CVD diamond [Crossref]
2024 - Challenges and opportunities of sub-6 GHz integrated sensing and communications for 5G-advanced and beyond [Crossref]
2020 - Diamond semiconductor devices, state-of-the-art of material growth and device processing
2024 - Hydrogen-terminated diamond field-effect transistors with 1011 ON/OFF ratio using an Al2O3/HfO2 stacked passivation layer [Crossref]
2021 - A study of linearity of C-H diamond FETs for S-band power application [Crossref]
2018 - Characterization and modeling of hydrogen-terminated MOSFETs with single-crystal and polycrystalline diamond [Crossref]
2020 - Negative constant voltage stress-induced threshold voltage instability in hydrogen-terminated diamond MOSFETs with low-temperature deposited Al2O3 [Crossref]
2022 - Characterization of substrate-trap effects in hydrogen-terminated diamond metal-oxide-semiconductor field-effect transistors [Crossref]