Improved thermal management of InP transistors in transferred‐substrate technology with diamond heat‐spreading layer

At a Glance

Metadata	Details
Publication Date	2015-06-01
Journal	Electronics Letters
Authors	Ksenia Nosaeva, Nils Weimann, Matthias Rudolph, W. John, Olaf Krueger
Institutions	Ferdinand-Braun-Institut, Kirchhoff (Germany)
Citations	28
Analysis	Full AI Review Included

6CCVD Technical Documentation: High-Power InP DHBT Thermal Management via MPCVD Diamond

This documentation analyzes the key findings of the research paper “Improved thermal management of InP transistors in transferred-substrate technology with diamond heat-spreading layer” and highlights how 6CCVD’s advanced MPCVD (Microwave Plasma Chemical Vapor Deposition) diamond solutions enable the replication and advancement of this critical high-frequency technology.

Executive Summary

This research successfully demonstrates the integration of a diamond heat spreader layer into Indium Phosphide (InP) Double-Hetero Bipolar Transistors (DHBTs) using a transferred-substrate (TS) process, yielding state-of-the-art thermal performance for high-frequency electronics.

Record Thermal Resistance: Integration of the diamond layer reduced the device thermal resistance ($R_{th}$) by approximately 75%, resulting in a record-low value of 1.1 K/mW for $0.8 \times 5$ µm² HBTs.
Material Selection: A 10 µm thick Nanocrystalline Diamond (NCD) layer, characterized by a high thermal conductivity of 600-800 W.m⁻¹.K⁻¹, was heterogeneously integrated to efficiently spread heat away from the active junction.
Extended Operating Range: The improved thermal management successfully increased the maximum dissipated power, extending the safe device operating range from 35 mW up to 40 mW.
Integration Method: The diamond layer was incorporated using a supplementary adhesive wafer-to-wafer bonding step (Benzocyclobutene, BCB) followed by combined mechanical/chemical removal of the Si carrier.
Precision Processing: Thermal and electrical vias were created through the diamond and BCB layers using highly controlled Inductively Coupled Plasma (ICP) etching, demonstrating critical micro-fabrication capabilities on diamond material.
High-Frequency Application: The diamond layer was brought into direct contact with the collector terminal, minimizing additional RF losses and maintaining high frequency performance ($f_{T}$ and $f_{max}$ still exceeding 321 GHz).

Technical Specifications

The following critical performance and material parameters were extracted from the research for replication and future engineering specification.

Parameter	Value	Unit	Context
Diamond Material Type	Nanocrystalline (NCD)	N/A	Used as vertical heat spreader.
Diamond Layer Thickness	10	µm	Integrated via wafer bonding process.
Diamond Thermal Conductivity	600-800	W.m⁻¹.K⁻¹	Critical thermal property of the NCD used.
Thermal Resistance (Improved)	1.1	K/mW	Lowest reported value for comparable HBT size (74% reduction).
Thermal Resistance (Baseline)	4.2	K/mW	Without diamond heat spreader.
Maximum Dissipated Power (Improved)	40	mW	Extended safe operating limit.
DHBT Emitter Area	$0.8 \times 5$	µm²	Dimensions of the single emitter-finger device.
AlN Carrier Thermal Conductivity	170	W.m⁻¹.K⁻¹	Host substrate thermal sink.
BCB Interlayer Thermal Conductivity	0.29	W.m⁻¹.K⁻¹	Low conductivity layer impedance must be bypassed by diamond.
Gold (G3) Contact Thickness	3.5	µm	Electroplated layer forming thermal vias and contact pads.
Integrated Cutoff Frequency ($f_{T}$)	321	GHz	Slight reduction (from 358 GHz) due to capacitive loading.
Plasma Etch Temperature Control	20	°C	Chuck temperature during diamond ICP etching.

Key Methodologies

The integration relies heavily on precise wafer-level bonding and advanced plasma etching processes adapted for robust diamond material.

Initial Device Fabrication: InP DHBT monolithic microwave integrated circuits were processed up to the G2 metal level, utilizing BCB as an interlayer dielectric on an Aluminum Nitride (AlN) host wafer.
Diamond Preparation: 10 µm thick NCD layers were obtained on 3-inch Silicon (Si) carrier wafers via Chemical Vapor Deposition (CVD).
Wafer Bonding: The NCD/Si structure was bonded to the finished InP DHBT wafer stack in a supplementary adhesive step using an EVG501 system for BCB bonding.
Si Carrier Removal: The original Si handle wafer was removed through a combined process involving mechanical lapping followed by chemical Potassium Hydroxide (KOH) etching.
Via Formation: Via holes were etched through the overlying diamond and BCB layers, exposing the G2 collector wiring level. This was performed using an Inductively Coupled Plasma (ICP) etch process with Fluorine/Oxygen (F/O) chemistry.
Thermal Control: Wafer temperature was critically maintained at 20 °C using helium back-side cooling during the 2-hour ICP etch process to prevent thermal runaway or damage.
Endpoint Detection: The endpoint of the etch process was precisely controlled and monitored using double beam in situ interferometry.
Final Metallization: A 3.5 µm thick Gold (G3) layer was electroplated into the vias to form the final high-conductance electrical and thermal contacts and pad metallization.

6CCVD Solutions & Capabilities

6CCVD provides the specialized MPCVD diamond materials and processing services required to replicate this high-performance thermal management solution for InP HBTs and extend it to next-generation mm-wave and sub-THz devices.

Applicable Materials

Requirement (Paper)	6CCVD Material Solution	Engineering Rationale
10 µm Nanocrystalline Diamond (NCD)	Polycrystalline Diamond (PCD) - Thermal Grade	We supply high-purity PCD layers (0.1 µm to 500 µm thick) with thermal conductivity guaranteed to meet or exceed 800 W.m⁻¹.K⁻¹. Our MPCVD process delivers superior purity and consistency compared to commercial NCD sources, ensuring maximal heat spreading efficiency.
Need for Low RF Loss Contact	Optical Grade Single Crystal Diamond (SCD)	For advanced RF/microwave applications requiring the absolute lowest dielectric loss (dissipation factor < 0.0001 at 1 GHz), 6CCVD offers high-purity, optical-grade SCD layers (up to 500 µm), ideal for direct collector contact interfaces.
Electrical Doping (Alternative Concept)	Boron-Doped Diamond (BDD)	If the application requires a semiconducting or conductive diamond layer for specialized device integration (e.g., highly conductive planar electrodes), 6CCVD provides heavily and lightly BDD material.

Customization Potential

The success of TS technology relies on precise material handling, custom dimensions, and robust metal adhesion, all core 6CCVD competencies.

Custom Dimensions and Substrates: The paper utilized 3-inch wafers. 6CCVD offers PCD plates and wafers up to 125 mm (5 inches) in diameter, accommodating advanced wafer-level manufacturing and high-volume transferred-substrate processes.
Precision Thickness Control: We provide SCD and PCD materials with thickness control ranging from 0.1 µm to 500 µm, allowing engineers to tailor the thermal path resistance precisely to specific HBT power dissipation requirements.
Post-Processing & Geometry: Replication requires precise via etching and patterning ($0.8 \times 5$ µm² scale features). 6CCVD offers advanced laser cutting and patterning services to create custom chip geometries, thermal trenches, and micro-scale features on diamond layers prior to bonding.
Advanced Metalization: The paper utilized 3.5 µm electroplated Au. 6CCVD provides comprehensive in-house metalization capabilities including the deposition of complex adhesion stacks (e.g., Ti/Pt/Au, Ti/W/Cu) optimized for high-temperature bonding processes and maximizing both electrical and thermal contact integrity.
Surface Finish for Bonding: Successful wafer bonding (BCB) relies on extremely low surface roughness. 6CCVD guarantees Ra < 1 nm for SCD and Ra < 5 nm for inch-size PCD layers, minimizing interface voids and enhancing bond strength and thermal coupling across the BCB/diamond interface.

Engineering Support

6CCVD’s in-house PhD team can assist with material selection, process optimization, and simulation for thermal management in similar InP HBT, GaAs PHEMT, and GaN HEMT projects operating in the RF/mm-wave spectrum. We specialize in tailoring diamond specifications (purity, doping, thickness, and surface finish) to minimize self-heating effects and maximize device lifetime and power output.

Call to Action: For custom specifications or material consultation, visit 6ccvd.com or contact our engineering team directly.

View Original Abstract

A method to improve the thermal management of indium phosphide (InP) double‐hetero bipolar transistors (DHBTs) fabricated in a transferred‐substrate technology is presented. A vapour‐phase deposited diamond layer acting as a heat spreader is heterogeneously integrated into the vertical layer stack. It is observed that the diamond layer reduces the thermal resistance of a 0.8 × 5 µm 2 single emitter-finger HBT by roughly 75% down to 1.1 K/mW which is, to the authors’ knowledge, the best value reported thus far for InP HBTs of comparable size. It is also the first demonstration of heterogeneous integration of diamond into an InP HBT monolithic microwave integrated circuit.

Tech Support

Original Source

DOI: https://doi.org/10.1049/el.2015.1135

References

2013 - Development of a via etch process through diamond and BCB for an advanced transferred‐substrate InP HBT process
2000 - A simple method for the thermal resistance measurement of AlGaAs/GaAs heterojunction bipolar transistors