Improvement of the Thermal Performance of the GaN-on-Si Microwave High-Electron-Mobility Transistors by Introducing a GaN-on-Insulator Structure

At a Glance

Metadata	Details
Publication Date	2024-12-21
Journal	Micromachines
Authors	Lu Hao, Zhihong Liu, Hanghai Du, Shenglei Zhao, Han Wang
Institutions	Xidian University, University of Hong Kong
Analysis	Full AI Review Included

Technical Documentation & Analysis: GaN-on-Insulator (GNOI) HEMTs

This document analyzes the research paper “Improvement of the Thermal Performance of the GaN-on-Si Microwave High-Electron-Mobility Transistors by Introducing a GaN-on-Insulator Structure” to highlight the critical role of high-thermal-conductivity diamond substrates and bonding layers. As an expert material scientist and technical sales engineer for 6CCVD, this analysis connects the research requirements directly to our MPCVD diamond capabilities, driving sales for advanced thermal management solutions.

Executive Summary

The research successfully demonstrates a novel GaN-on-Insulator (GNOI) structure to overcome the primary thermal bottleneck in conventional GaN-on-Si High-Electron-Mobility Transistors (HEMTs).

Core Problem Addressed: The low thermal conductivity of the Si substrate and the necessary III-nitride transition layer severely limit the power handling and RF performance of GaN-on-Si HEMTs.
Proposed Solution: Removal of the low-conductivity transition layer and transfer of the active GaN layers onto a new Si substrate using a high-thermal-conductivity bonding dielectric (SiC, AlN, or Diamond).
Diamond Superiority: Electrothermal simulations confirmed that diamond is the optimal bonding dielectric, achieving the lowest thermal resistance (R_th).
Key Performance Gain: The GNOI structure utilizing a 2 µm diamond bonding layer reduced R_th by 40% (from 31 °C/(W/mm) to 19 °C/(W/mm)) compared to the conventional GaN-on-Si HEMT.
Power Handling Improvement: Maximum heat dissipated power density (P_150°C) increased significantly from 5.7 W/mm (conventional) to 8.0 W/mm (diamond GNOI).
Device Impact: The improved thermal management resulted in a 22% increase in peak transconductance (g_mmax), validating the potential of GNOI-on-Diamond for high-power microwave applications.

Technical Specifications

The following hard data points were extracted from the electrothermal simulation results, highlighting the performance differential achieved by utilizing high-thermal-conductivity bonding dielectrics, particularly diamond.

Parameter	Value	Unit	Context
Conventional HEMT Thermal Resistance (R_th)	31	°C/(W/mm)	GaN-on-Si baseline
Diamond GNOI Thermal Resistance (R_th)	19	°C/(W/mm)	2 µm diamond bonding layer
R_th Reduction (Diamond)	40	%	Compared to conventional GaN-on-Si
Conventional HEMT Max Power Density (P_150°C)	5.7	W/mm	At 150 °C peak temperature
Diamond GNOI Max Power Density (P_150°C)	8.0	W/mm	2 µm diamond bonding layer
Peak Transconductance (g_mmax) Improvement	22	%	GNOI Diamond (2 µm) vs. Conventional HEMT (at V_DS=20 V)
Gate Length (L_G)	0.25	µm	Simulated HEMT dimension
Si Substrate Thickness	100	µm	Thinned substrate used in simulation
Bonding Dielectric Thickness Range	0.2 to 2.0	µm	Simulated thickness variation
Diamond Thermal Conductivity (k_RT)	2.12 to 3.7	W/cm·K	Dependent on thickness (0.2 µm to 2.0 µm)

Key Methodologies

The study utilized advanced simulation techniques to model the thermal and electrical behavior of the proposed GaN-on-Insulator (GNOI) structure.

Structure Modification: The conventional GaN-on-Si structure was modified by removing the low-thermal-conductivity AlN/GaN super-lattice (SL) transition layer.
GNOI Formation: The remaining active nitride epilayers (GaN buffer, AlGaN barrier, GaN cap) were modeled as being transferred onto a new Si substrate via wafer bonding.
Dielectric Selection: Four bonding dielectric materials were analyzed: SiO₂, SiC, AlN, and diamond, with thicknesses ranging from 0.2 µm to 2.0 µm.
Simulation Platform: Three-dimensional electrothermal simulations were conducted using the device simulator ATLAS (Silvaco TCAD 2019).
Thermal Modeling: Thermal conductivity (k) for all materials was considered temperature-dependent, following the model: k(T) = k_RT(300/(273 + T))^a.
Performance Metrics: Thermal performance was quantified by calculating the thermal resistance (R_th) and the maximum power density (P_150°C) allowable at a peak junction temperature of 150 °C.

6CCVD Solutions & Capabilities

The research confirms that high-quality, high-thermal-conductivity diamond is essential for realizing the full potential of next-generation GaN HEMTs. 6CCVD specializes in MPCVD diamond materials and processing required to replicate and extend this critical thermal management technology.

Applicable Materials

The study requires diamond films optimized for thermal spreading and wafer bonding.

Material Recommendation: High-Thermal-Conductivity Polycrystalline Diamond (PCD).
- The paper notes that even poly-crystalline or nano-crystalline diamond (k_RT up to 3.7 W/cm·K) significantly outperforms SiC and AlN, especially at thicknesses up to 2 µm. 6CCVD’s MPCVD PCD offers the necessary high thermal conductivity and scalability for this application.
Thickness Control: 6CCVD provides PCD films with precise thickness control, ranging from 0.1 µm up to 500 µm, allowing researchers to optimize the bonding layer thickness beyond the 2 µm maximum simulated in the paper for potentially greater heat dissipation.

Customization Potential

Successful GNOI fabrication relies heavily on material quality, surface preparation, and integration capabilities—all core strengths of 6CCVD.

Research Requirement	6CCVD Capability	Value Proposition
High-Quality Wafer Bonding	Ultra-Low Roughness Polishing.	Our advanced polishing achieves surface roughness Ra < 5 nm for inch-size PCD wafers, critical for achieving robust, void-free wafer bonding required for GNOI structures.
Large-Scale Integration	Custom Dimensions up to 125 mm.	We supply PCD plates and wafers up to 125 mm in diameter, supporting the transition from R&D to large-wafer mass production foundries (as referenced in the paper).
Integrated Device Fabrication	In-House Custom Metalization.	We offer internal deposition of standard HEMT contact metals (Au, Pt, Pd, Ti, W, Cu) directly onto the diamond substrate, streamlining the complex GaN-on-Diamond integration process.
Substrate Thickness Optimization	Custom Substrate Thickness (up to 10 mm).	While the Si substrate was thinned to 100 µm, 6CCVD can provide diamond substrates (or PCD layers on carriers) with custom thicknesses to optimize overall device thermal stack performance.

Engineering Support

The successful implementation of GaN-on-Diamond (GNOI) technology involves overcoming significant challenges related to interfacial thermal boundary conductance, wafer bow, and surface preparation, as noted by the authors.

Thermal Management Expertise: 6CCVD’s in-house PhD engineering team specializes in the thermal properties and integration of MPCVD diamond. We offer consultation on material selection, surface preparation, and thermal stack design for similar High-Power Microwave HEMT projects.
Interfacial Optimization: We assist researchers in selecting the optimal diamond grade and surface finish to minimize thermal boundary resistance (TBR) between the GaN buffer and the diamond bonding layer, maximizing the 40% R_th reduction demonstrated in this study.

For custom specifications or material consultation, visit 6ccvd.com or contact our engineering team directly.

View Original Abstract

GaN-on-Si high-electron-mobility transistors have emerged as the next generation of high-powered and cost-effective microwave devices; however, the limited thermal conductivity of the Si substrate prevents the realization of their potential. In this paper, a GaN-on-insulator (GNOI) structure is proposed to enhance the heat dissipation ability of a GaN-on-Si HEMT. Electrothermal simulation was carried out to analyze the thermal performance of the GNOI-on-Si HEMTs with different insulator dielectrics, including SiO2, SiC, AlN, and diamond. The thermal resistance of the HEMTs was found to be able to be obviously reduced and the DC performance of the device can be obviously improved by removing the low-thermal-conductivity III-nitride transition layer and forming a GNOI-on-Si structure with SiC, AlN, or diamond as the bonding insulator dielectrics.

Tech Support

Original Source

DOI: https://doi.org/10.3390/mi15121525

References

2019 - Deeply-scaled GaN-on-Si high electron mobility transistors with record cut-off frequency fT of 310 GHz [Crossref]
2009 - 12.88 W/mm GaN high electron mobility transistor on silicon substrate for high voltage operation [Crossref]
2004 - AlGaN/GaN HEMTs on Si substrate with 7 W/mm output power density at 10 GHz [Crossref]
2012 - 150-GHz cutoff frequencies and 2-W/mm output power at 40 GHz in a millimeter-wave AlGaN/GaN HEMT technology on silicon [Crossref]
2013 - Scaling of GaN HEMTs and Schottky diodes for submillimeter-wave MMIC applications [Crossref]
2004 - Performance of the AlGaN HEMT structure with a gate extension [Crossref]
2005 - High-power AlGaN/GaN HEMTs for Ka-band applications [Crossref]
2013 - Electrothermal simulation and thermal performance study of GaN vertical and lateral power transistors [Crossref]
2016 - Review of raman thermography for electronic and opto-electronic device measurement with submicron spatial and nanosecond temporal resolution [Crossref]