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Diamonds in the Current - Navigating Challenges for the Integration of Diamond in Power Electronics

MetadataDetails
Publication Date2024-02-29
Journalphysica status solidi (a)
AuthorsDavid Eon
InstitutionsInstitut polytechnique de Grenoble, Université Grenoble Alpes
Citations6
AnalysisFull AI Review Included

Technical Documentation: MPCVD Diamond for Ultra-Wide Bandgap Power Electronics

Section titled “Technical Documentation: MPCVD Diamond for Ultra-Wide Bandgap Power Electronics”

This review highlights diamond’s critical role as an Ultra-Wide Bandgap Semiconductor (UWBGS) poised to revolutionize power electronics (PE) due to its exceptional intrinsic properties.

  • Superior Performance Potential: Diamond exhibits the highest known thermal conductivity (10-22 W cm-1 K-1) and critical electric field (up to 10 MV cm-1), enabling devices with minimal loss and high-temperature operation (up to 1100 °C).
  • Key Device Focus: Research is currently focused on Schottky diodes, which are the most technologically mature diamond PE component, achieving breakdown voltages up to 12 kV.
  • Material Challenges: The primary hurdles for commercial integration are the limited size of high-quality substrates (currently < 4x4 mm2) and high dislocation densities, which severely limit device yield and effective contact area.
  • Defect Density Requirement: To achieve competitive resistance (< 0.1 Ω) and high blocking voltages (e.g., 1000 V), defect concentrations must be reduced significantly, ideally below 100 defects cm-2.
  • Doping and Architecture: P-type doping using boron (BDD) is well-established (1e15-1e21 boron atoms cm-3), supporting advanced architectures like pseudo-vertical diodes and JFETs.
  • Thermal Management Specificity: Diamond’s unique temperature-dependent resistivity requires specialized thermal management strategies, with optimal operation observed around 400-500 K (127-227 °C).

The following intrinsic properties confirm diamond’s status as a disruptive UWBGS material for high-power, high-frequency applications, compared to conventional and wide bandgap materials (Si, SiC, GaN).

ParameterValueUnitContext
Bandgap (Eg)5.5eVHighest among UWBGS materials reviewed.
Thermal Conductivity (λ)10-22W cm-1 K-1Exceptional heat dissipation capability.
Critical Electric Field (Ec)7.5-10MV cm-1Enables high breakdown voltage devices.
Hole Mobility (ÎŒp)2000cm2 V-1 s-1Highest mobility for holes at Room Temperature (RT).
Electron Mobility (ÎŒn)1000cm2 V-1 s-1High electron mobility at RT.
Maximum Operating Temp (Tmax)1100°CTheoretical limit for diamond devices.
Optimal Operating Temp400-500KTemperature range for minimum resistivity.
Required Defect Density< 100defects cm-2Necessary for high-voltage (> 1000 V) components.
Current Wafer Diameter0.5inchCommercially available with moderate dislocations (> 104 cm-2).
Target Resistance (Ron)< 0.1ΩRequired to compete with SiC in converter applications.
Boron Doping Range1e15-1e21atoms cm-3Achievable range for p-type doping.
Schottky Diode Breakdown8-12kVHighest reported breakdown voltages.

The research and development efforts outlined in the paper focus heavily on material synthesis and device architecture optimization to overcome current limitations.

  1. Material Synthesis Comparison:
    • HPHT (High-Pressure High-Temperature): Produces high crystalline quality (average dislocation densities ~1e4 cm-2) but is limited in affordable substrate size (currently 4x4 mm2).
    • CVD (Chemical Vapour Deposition): Used for homoepitaxial growth, generally resulting in higher dislocation densities than HPHT, but offers pathways for surface enlargement.
  2. Surface Enlargement Techniques (CVD Focus):
    • 3D Homoepitaxial Growth: Manipulating growth parameters to favor crystalline orientations, resulting in 10-12 mm crystals, but often with high defect counts.
    • Paving or Mosaic Techniques: Placing small substrates close together and using CVD recovery to join them (e.g., 1/2 inch mosaic wafers available, but high dislocation density at junctions).
    • SmartCut Solutions: Removing thin diamond flakes via hydrogen implantation and annealing for molecular bonding onto a surface.
    • Heteroepitaxy: Growing diamond on non-diamond substrates (e.g., Ir/SrTiO3/Si), achieving large sizes (up to 92 mm) but with very high defect densities (1e6-1e10 cm-2), making them unsuitable for electronic components.
  3. Doping and Electrical Control:
    • P-type Doping: Achieved reliably during growth using Boron (BDD).
    • N-type Doping: Remains challenging, often relying on surface transfer doping (hydrogenated surface) for transistors (JFET, MESFET, MOS).
  4. Device Architecture:
    • Vertical Architectures: Utilizing heavily Boron-Doped (BDD) buried layers or substrates to allow current flow in one direction, significantly reducing series resistance compared to lateral structures.
    • Deep Depletion Transistors: Based on the principle of closing the channel by extending the space charge region, achieving breakdown voltages > 650 V.

6CCVD’s advanced MPCVD capabilities directly address the material limitations and customization requirements necessary to replicate and advance the diamond power electronics research detailed in this paper.

To achieve the high performance and specific doping profiles required for devices like Schottky diodes and vertical transistors, 6CCVD recommends the following materials:

Research Requirement6CCVD Material SolutionKey Benefit
High Breakdown Voltage (Ec)Optical Grade SCDUltra-high purity, low defect density (essential for achieving < 100 defects cm-2).
P-type Conduction LayerBoron-Doped Diamond (BDD)Precise, controllable doping (1e15-1e21 cm-3) for epitaxial layers and heavily doped substrates.
Large Area SubstratesPolycrystalline Diamond (PCD)Available in large formats (up to 125mm) for thermal management layers or large-scale device prototyping.
Surface Transfer DopingHydrogen-Terminated SCDHigh-quality SCD wafers prepared for surface transfer doping mechanisms (e.g., for JFET/MOS research).

The paper emphasizes that current limitations stem from substrate size, defect density, and contact resistance. 6CCVD offers solutions that directly mitigate these issues:

  • Substrate Size and Thickness:
    • Large Area PCD: We offer PCD plates/wafers up to 125mm in diameter, addressing the critical need for larger substrates for thermal spreading layers or large-area device integration.
    • Custom SCD Thickness: SCD epitaxial layers can be grown from 0.1 ”m up to 500 ”m, allowing researchers to optimize the thickness and doping of the drift layer (as discussed in Section 2) for specific breakdown voltage targets (e.g., 10 kV).
  • Surface Quality:
    • Ultra-Low Roughness Polishing: Our SCD wafers are polished to achieve surface roughness Ra < 1 nm, which is crucial for high-yield microfabrication and minimizing interface defects in complex transistor structures (MOS, JFET).
  • Advanced Metalization Services:
    • The development of vertical architectures and low-resistance contacts requires precise metal stacks. 6CCVD provides in-house metalization capabilities, including Au, Pt, Pd, Ti, W, and Cu, enabling researchers to test various Schottky barrier heights and ohmic contact schemes essential for minimizing Ron.

The successful integration of diamond requires balancing electrical performance (high voltage, low resistance) with material quality (low defects, large area).

  • Defect Management Consultation: 6CCVD’s in-house PhD team specializes in MPCVD growth optimization and can consult on material selection to meet specific defect density targets (< 104 cm-2 or lower) required for high-yield Schottky Diode and Vertical Transistor projects.
  • Thermal Design Integration: Given diamond’s unique thermal behavior (optimal operation at 400-500 K), our experts assist engineers in selecting the optimal diamond grade and thickness for thermal management layers to ensure stable operation and prevent thermal runaway.

For custom specifications or material consultation, visit 6ccvd.com or contact our engineering team directly.

View Original Abstract

Power electronics, a pivotal field orchestrating electrical energy flow in the modern world, deals with efficient conversion, control, and management of electrical power across diverse applications. While its scope encompasses circuits for energy conversion, its challenges include transporting electrical energy over extended distances. Focusing on electrical‐to‐electrical conversions, the goal is minimal loss for delivering maximum power. The article explores the intricacies of power electronics, presenting key equations, and concepts. The current global power electronics market witnesses growth, driven by demand for energy‐efficient technologies, renewables integration, and the rise of electric vehicles. Future trends indicate continued growth, driven by renewable energy systems, and electric vehicles. Wide bandgap semiconductors, play a crucial role, with ultra‐wide bandgap semiconductors like diamond emerging as potential disruptors. A comparative analysis of semiconductor properties reveals diamond’s unique attributes. Despite its challenges, diamond shows promise for power electronic applications, with ongoing research on components like Schottky diodes. Thermal considerations, substrate limitations, and dislocation challenges are discussed, emphasizing the need for advancements to harness the full potential of diamond in power electronics. Finally, some inputs about the importance of overcoming these challenges for the successful integration of diamond in power electronic systems are given.

  1. 2004 - Thin Film Diam. II