Suppression of High Threshold Voltage for Boron-Doped Diamond MOSFETs
At a Glance
Section titled “At a Glance”| Metadata | Details |
|---|---|
| Publication Date | 2024-01-30 |
| Journal | IEEE Transactions on Electron Devices |
| Authors | Jiangwei Liu, Tokuyuki Teraji, Bo Da, Yasuo Koide |
| Institutions | National Institute for Materials Science |
| Citations | 6 |
| Analysis | Full AI Review Included |
Suppression of High Threshold Voltage for Boron-doped Diamond MOSFETS: Technical Analysis and 6CCVD Solutions
Section titled “Suppression of High Threshold Voltage for Boron-doped Diamond MOSFETS: Technical Analysis and 6CCVD Solutions”This document analyzes the research detailing the suppression of high threshold voltage ($V_{TH}$) in Boron-doped Diamond (B-diamond) MOSFETs, providing technical specifications and outlining how 6CCVD’s advanced MPCVD diamond materials and customization services can support and extend this critical research area.
Executive Summary
Section titled “Executive Summary”This research successfully demonstrates a methodology for achieving extremely low threshold voltages in B-diamond Metal-Oxide-Semiconductor Field-Effect Transistors (MOSFETs), a key requirement for developing diamond complementary MOS (CMOS) circuits.
- Core Achievement: $V_{TH}$ was successfully suppressed to a minimum value of 0.8 V, significantly lower than previously reported values (e.g., 56.1 V).
- Optimization Strategy: $V_{TH}$ suppression was achieved by precisely adjusting three parameters: B-diamond epitaxial layer thickness (800 nm), Boron Acceptor Concentration ($N_A$) (1.36 x 1016 cm-3), and $Al_2O_3$ gate oxide thickness (45 nm).
- Material Foundation: Devices were fabricated on oxygen-terminated B-diamond channels grown via Microwave Plasma-Assisted Chemical Vapor Deposition (MPCVD) on Ib-type (100) substrates.
- Performance Metrics: Devices exhibited high On/Off ratios (> 106) and low Subthreshold Swing (SS) values (down to 260 mV/dec).
- Conduction Mechanism: The leakage current analysis confirmed the conduction mechanism in the $Al_2O_3$/B-diamond MOS capacitor is consistent with the Fowler-Nordheim tunneling model at high voltages.
- Future Direction: The study highlights the necessity of balancing low $V_{TH}$ with high output current for practical B-diamond MOSFET applications.
Technical Specifications
Section titled “Technical Specifications”The following table summarizes the critical material and performance parameters achieved in the optimized B-diamond MOSFETs.
| Parameter | Value | Unit | Context |
|---|---|---|---|
| B-Diamond Epitaxial Thickness | 800 | nm | Active Channel Layer |
| Acceptor Concentration ($N_A$) | 1.36 x 1016 | cm-3 | Deduced by C-V measurement |
| Gate Oxide Thickness ($Al_2O_3$) | 45 | nm | Deposited via ALD at 200 °C |
| Surface Roughness (RMS) | < 0.2 | nm | Polished B-diamond surface |
| Lowest Threshold Voltage ($V_{TH}$) | 0.8 ± 0.1 | V | Achieved in MOSFET-III |
| Maximum Drain Current ($ | I_{D,max} | $) Range | -2.4 to -4.3 |
| On/Off Ratio | > 106 | N/A | For all fabricated devices |
| Subthreshold Swing (SS) Range | 260 - 380 | mV/dec | Indicating low interface trap density |
| Flat Band Voltage ($V_{FB}$) | -19.5 | V | $Al_2O_3$/B-diamond capacitor |
| Valence Band Offset (VBO) | 2.9 | eV | $Al_2O_3$/B-diamond heterojunction |
| Conduction Band Offset (CBO) | 1.2 | eV | $Al_2O_3$/B-diamond heterojunction |
Key Methodologies
Section titled “Key Methodologies”The device fabrication relied on precise control over material growth, surface termination, and thin-film deposition techniques.
- Substrate Preparation: Ib-type (100) diamond substrates were polished to an ultra-smooth finish (Ra: 0.1 nm) and acid-cleaned ($H_2SO_4 + HNO_3$) at 300 °C for 3 hours.
- Epitaxial Growth: A B-diamond epitaxial layer (800 nm thick) was grown using Microwave Plasma-Assisted Chemical Vapor Deposition (MPCVD).
- Surface Termination: The channel surface was modified from hydrogen-terminated to oxygen-terminated using a mixture acid solution ($H_2SO_4 + HNO_3$).
- Source/Drain Metalization: Ti (10 nm) / Au (150 nm) electrodes were evaporated, followed by lift-off and Rapid Thermal Annealing (RTA) at 550 °C for 20 minutes to ensure Ohmic contact formation.
- Gate Oxide Deposition: A 45 nm-thick $Al_2O_3$ film was deposited using Atomic Layer Deposition (ALD) at 200 °C, utilizing $Al(CH_3)_3$ and water vapor precursors.
- Gate Metalization: Ti (10 nm) / Au (150 nm) electrodes were deposited for the gate.
- Contact Window Etching: Contact windows were opened using Capacitively Coupled Plasma Reactive-Ion Etching (RIE) in a $CHF_3 + Ar$ atmosphere (100 W power, $CHF_3$ flow: 10 sccm, Ar flow: 40 sccm).
6CCVD Solutions & Capabilities
Section titled “6CCVD Solutions & Capabilities”6CCVD is uniquely positioned to supply the high-purity, precisely engineered diamond materials required to replicate and advance this research into low-$V_{TH}$ B-diamond MOSFETs and CMOS circuits.
Applicable Materials
Section titled “Applicable Materials”To achieve the precise control over doping and thickness demonstrated in this paper, researchers require high-quality, custom-grown single crystal diamond (SCD).
| Research Requirement | 6CCVD Material Solution | Specification Match |
|---|---|---|
| Boron-Doped Channel ($N_A$: 1.36 x 1016 cm-3) | Boron-Doped Single Crystal Diamond (BDD-SCD) | We offer precise, uniform BDD doping control across the range of 1015 to 1020 cm-3, essential for fine-tuning $V_{TH}$ and channel conductivity. |
| Ultra-Thin Epitaxial Layer (800 nm) | Custom SCD Thicknesses | Our MPCVD capabilities guarantee SCD layer thickness control from 0.1 µm up to 500 µm (and substrates up to 10 mm), allowing exact replication or scaling of the 800 nm active layer. |
| High-Quality Surface Finish (Ra < 0.2 nm) | Optical Grade Polishing (SCD) | Our standard SCD polishing achieves Ra < 1 nm, ensuring minimal surface defects and maximizing the quality of the $Al_2O_3$/Diamond interface, critical for achieving low SS values. |
Customization Potential
Section titled “Customization Potential”The success of this research hinges on specific dimensions and material interfaces. 6CCVD provides comprehensive customization to meet these exact engineering needs.
- Custom Metalization: The paper utilized Ti/Au stacks for both Ohmic and Gate contacts. 6CCVD offers internal metalization services, including deposition of Ti, Au, Pt, Pd, W, and Cu. We can provide pre-metalized wafers, streamlining the fabrication process and ensuring high-quality, RTA-compatible Ohmic contacts.
- Custom Dimensions and Geometry: While the paper used specific gate lengths ($L_G$) and interspace lengths ($L_{S-G}$, $L_{D-G}$), 6CCVD can supply SCD wafers up to 15mm x 15mm and large-area Polycrystalline Diamond (PCD) plates up to 125mm in diameter, supporting both R&D and eventual scale-up.
- Laser Cutting and Shaping: We offer precision laser cutting services to define complex device geometries and ensure accurate alignment for lithography and subsequent processing steps like RIE etching.
Engineering Support
Section titled “Engineering Support”The trade-off between low $V_{TH}$ and high output current is a central challenge identified in this paper. Optimizing this balance requires expert knowledge of diamond growth and doping profiles.
6CCVD’s in-house PhD team specializes in MPCVD growth optimization and can assist researchers in selecting the ideal material specifications (doping concentration, compensation level, and thickness) for similar B-diamond MOSFET and CMOS circuit projects. We provide consultation on achieving the necessary balance for high-performance, low-power diamond electronics.
For custom specifications or material consultation, visit 6ccvd.com or contact our engineering team directly.
View Original Abstract
Suppression of high threshold voltage ( <inline-formula xmlns:mml=“http://www.w3.org/1998/Math/MathML” xmlns:xlink=“http://www.w3.org/1999/xlink”> <tex-math notation=“LaTeX”>${V} _{\text {TH}}$ </tex-math></inline-formula> ) for the boron-doped diamond (B-diamond) MOSFETs plays a key role to design the diamond complementary MOS circuits with low gate drive sources. The <inline-formula xmlns:mml=“http://www.w3.org/1998/Math/MathML” xmlns:xlink=“http://www.w3.org/1999/xlink”> <tex-math notation=“LaTeX”>${V} _{\text {TH}}$ </tex-math></inline-formula> can be further suppressed by adjusting B-diamond epitaxial layer thickness, boron doping concentration, and gate oxide thickness. Three MOSFETs with different device structures are fabricated on the same oxygen-terminated B-diamond channel. Thickness and acceptor concentration for the B-diamond epitaxial layer are approximately 800 nm and <inline-formula xmlns:mml=“http://www.w3.org/1998/Math/MathML” xmlns:xlink=“http://www.w3.org/1999/xlink”> <tex-math notation=“LaTeX”>$1.36\times 10^{{16}}$ </tex-math></inline-formula> cm−3, respectively. A 45 nm-thick Al2O3 is deposited as the gate oxide by an atomic layer deposition technique. Maximum drain currents and ON/OFF ratios for the B-diamond MOSFETs are in the range of <inline-formula xmlns:mml=“http://www.w3.org/1998/Math/MathML” xmlns:xlink=“http://www.w3.org/1999/xlink”> <tex-math notation=“LaTeX”>$-2.4\sim - 4.3,,\mu \text{A}$ </tex-math></inline-formula> /mm and greater than <inline-formula xmlns:mml=“http://www.w3.org/1998/Math/MathML” xmlns:xlink=“http://www.w3.org/1999/xlink”> <tex-math notation=“LaTeX”>$10^{{6}}$ </tex-math></inline-formula> , respectively. Their <inline-formula xmlns:mml=“http://www.w3.org/1998/Math/MathML” xmlns:xlink=“http://www.w3.org/1999/xlink”> <tex-math notation=“LaTeX”>${V} _{\text {TH}}$ </tex-math></inline-formula> values are lower than 3.4 V with the lowest one of 0.8 V.