High-temperature sensitivity complex dielectric/electric modulus, loss tangent, and AC conductivity in Au/(S -DLC)/p-Si (MIS) structures
At a Glance
Section titled âAt a Glanceâ| Metadata | Details |
|---|---|
| Publication Date | 2024-01-01 |
| Journal | Journal of Materials Science Materials in Electronics |
| Authors | A. TataroÄlu, HĂŒlya DurmuĆ, A. Feizollahi Vahid, BarÄ±Ć Avar, Ć. Altındal |
| Institutions | BĂŒlent Ecevit University, Gazi University |
| Citations | 16 |
| Analysis | Full AI Review Included |
Technical Documentation & Analysis: High-Temperature Diamond MIS Structures
Section titled âTechnical Documentation & Analysis: High-Temperature Diamond MIS StructuresâExecutive Summary
Section titled âExecutive SummaryâThis research investigates the complex dielectric and AC conductivity properties of Au/(S:DLC)/p-Si Metal-Interlayer-Semiconductor (MIS) structures across a wide temperature range (80 K to 440 K). The findings confirm the viability of diamond-based interlayers for high-performance electronic devices, directly aligning with 6CCVDâs expertise in high-purity, custom MPCVD diamond materials.
- High-Temperature Stability: The device maintains functionality and exhibits thermally activated conduction up to 440 K, demonstrating suitability for high-temperature power electronics and sensing applications.
- Enhanced Energy Storage: The observed high real dielectric constant ($\epsilonâ$ $\sim$ 14 at 100 kHz) indicates that the structure possesses significant charge storage capabilities, ideal for advanced capacitors.
- Advanced Sensing Potential: The structure exhibits very high temperature sensitivity (S = dV/dT) ranging from -21 mV/K to -28 mV/K, confirming its utility as a highly sensitive temperature sensor.
- Conduction Mechanism: Analysis confirms that the predominant charge transport mechanism is the hopping of electronic charges between interface traps (Nss), particularly in the high-temperature regime (260-440 K).
- Material Opportunity: While the paper utilized electrodeposited S:DLC, 6CCVD offers superior, high-purity MPCVD Polycrystalline Diamond (PCD) and Boron-Doped Diamond (BDD) films, which provide enhanced thermal management and intrinsic dielectric properties for next-generation devices.
Technical Specifications
Section titled âTechnical SpecificationsâThe following hard data points were extracted from the admittance/impedance spectroscopy analysis of the Au/(S:DLC)/p-Si MIS structure:
| Parameter | Value | Unit | Context |
|---|---|---|---|
| Operating Temperature Range | 80 - 440 | K | C-V-T and G/$\omega$-V-T measurements |
| Measurement Frequencies | 0.1 and 0.5 | MHz | Dielectric and conductivity analysis |
| Applied Voltage Range | -4 to +8 | V | Device characterization |
| High-Temperature Activation Energy (Ea) | 186.56 - 189.41 | meV | Region 2 (260-440 K) |
| Low-Temperature Activation Energy (Ea) | 5.78 - 6.04 | meV | Region 1 (80-230 K) |
| Maximum Dielectric Constant ($\epsilonâ$) | $\sim$14 | N/A | Observed at 100 kHz |
| Temperature Sensitivity (S = dV/dT) | -26 to -28 | mV/K | At 100 kHz (6 nF and 7 nF capacitance) |
| Interlayer Thickness (SEM Observation) | 20.69 - 32.72 | nm | Observed film thickness |
| Metal Contact | Au | N/A | Schottky contact material |
Key Methodologies
Section titled âKey MethodologiesâThe experimental procedure focused on the fabrication and electrical characterization of the MIS structure:
- Interlayer Deposition: Sulfur-doped Diamond-Like Carbon (S:DLC) film was grown onto a p-Si wafer using a two-electrode electrodeposition technique.
- Electrolyte Composition: The electrolyte consisted of 100 ml methanol (carbon source) and 100 ”l thiophene (sulfur source).
- Deposition Parameters: The process utilized a graphite plate (anode) and p-Si substrate (cathode) with an applied potential of 500 V over a duration of 2 hours.
- Structural Analysis: Film morphology (continuous, crack-free, lumpy) was confirmed via Scanning Electron Microscopy (SEM). Chemical composition (C-S, C-C, S 2p) was verified using X-Ray Photoelectron Spectroscopy (XPS).
- Device Fabrication: Gold (Au) contacts were deposited onto the S:DLC layer to form the Au/(S:DLC)/p-Si MIS device.
- Electrical Characterization: Admittance (C-V-T) and conductance (G/$\omega$-V-T) measurements were performed using an HP-4192A LF impedance analyzer within a VPF-475 cryostat.
- Data Analysis: Complex dielectric ($\epsilon^$), electric modulus (M), loss tangent (tan$\delta$), and AC conductivity ($\sigma_{ac}$) were calculated from the measured C and G data across the specified temperature and frequency ranges.
6CCVD Solutions & Capabilities
Section titled â6CCVD Solutions & CapabilitiesâThe research successfully demonstrates the potential of diamond-based interlayers in high-performance MIS devices. 6CCVDâs expertise in high-purity MPCVD diamond offers direct, scalable solutions to replicate and significantly enhance the performance of this research, particularly in high-power and high-temperature environments where electrodeposited DLC films may fail.
| Research Requirement/Challenge | 6CCVD MPCVD Diamond Solution | Technical Advantage |
|---|---|---|
| Interlayer Material Purity & Stability | High-Purity Polycrystalline Diamond (PCD) or Single Crystal Diamond (SCD) | MPCVD diamond offers superior intrinsic thermal conductivity and chemical inertness compared to electrodeposited DLC, ensuring stable operation far exceeding the 440 K limit demonstrated. |
| Semiconducting/Doping Needs | Boron-Doped Diamond (BDD) Wafers and Films | BDD provides tunable conductivity (semiconducting to metallic) for precise control over the barrier height and interface properties (Nss), critical for optimizing Schottky contacts and minimizing trap density. |
| Custom Contact Metalization (Au) | In-House Metalization Services (Au, Ti/Pt/Au, W, Cu) | 6CCVD provides cleanroom-deposited, high-adhesion metal stacks (including Au, as used in the paper) directly onto the diamond surface, ensuring reliable, low-resistance contacts for high-frequency operation. |
| Interface Quality (Nss Reduction) | Ultra-Smooth Polishing (Ra < 1 nm for SCD, < 5 nm for PCD) | We deliver diamond surfaces with exceptional flatness, which directly minimizes the interface state density (Nss) identified in the paper as controlling polarization and conduction mechanisms. |
| Scalability and Dimensions | Large Area PCD Plates (Up to 125 mm diameter) | 6CCVD can supply diamond wafers in custom dimensions and thicknesses (PCD up to 125 mm, SCD up to 500 ”m thick), enabling the transition from laboratory prototypes to industrial-scale MIS capacitor and sensor arrays. |
| Thickness Control | Precise Thickness Control (0.1 ”m to 500 ”m for SCD/PCD) | We offer precise control over the interlayer thickness ($d$), a key parameter influencing capacitance and dielectric properties, allowing researchers to optimize device performance based on Equation (2) ($\text{C}_0 = \epsilon \text{A}/d$). |
Engineering Support
Section titled âEngineering Supportâ6CCVDâs in-house PhD engineering team specializes in optimizing diamond material properties for extreme environments. We can assist researchers and engineers in selecting the ideal MPCVD diamond grade (SCD, PCD, or BDD) and surface preparation to maximize dielectric strength, minimize loss tangent (tan$\delta$), and achieve superior temperature sensing performance for similar High-Temperature MIS Capacitor and Sensor projects.
For custom specifications or material consultation, visit 6ccvd.com or contact our engineering team directly.
View Original Abstract
Abstract Complex dielectric ( Δ * = ΔâČ â jΔⳠ)/electric modulus ( M * = MâČ + jM âł), loss tangent (tan ÎŽ ), and ac conductivity ( Ï ac ) properties of Au/(S-DLC)/p-Si structures were investigated by utilizing admittance/impedance measurements between 80 and 440 K at 0.1 and 0.5 MHz. Sulfur-doped diamond-like carbon (S:DLC) was used an interlayer at Au/p-Si interface utilizing electrodeposition method. The capacitance/conductance (C/G) or ( Δ â ~ C) and ( Δ âł ~ G) values found to be highly dependent on both frequency and temperature. The increase of them with temperatures was attributed to the thermal-activated electronic charges localized at interface states ( N ss ) and decrease in bandgap energy of semiconductor. The observed high Δ âČ and Δ âł values at 0.1 MHz is the result of the space/dipole polarization and N ss . Because the charges are at low frequencies, dipoles have sufficient time to rotation yourself in the direction of electric field and N ss can easily follow the ac signal. Arrhenius plot (ln( Ï ac ) vs 1/ T ) shows two distinctive linear parts and activation energy ( E a ) value was found as 5.78 and 189.41 from the slope; this plot at 0.5 MHz is corresponding to low temperature (80-230 K) and high temperature (260-440 K), respectively. The observed higher E a and Δ âČ (~ 14 even at 100 kHz) show that hopping of electronic charges from traps to others is predominant charge transport mechanism and the prepared Au/(S:DLC)/p-Si structure can be used to store more energy.