Single-Charge Tunneling in Codoped Silicon Nanodevices

At a Glance

Metadata	Details
Publication Date	2023-06-22
Journal	Nanomaterials
Authors	Daniel Moraru, Tsutomu Kaneko, Yuta Tamura, Taruna Teja Jupalli, Rohitkumar Shailendra Singh
Institutions	Shizuoka University, Alexandru Ioan Cuza University
Citations	8
Analysis	Full AI Review Included

Technical Documentation & Analysis: Single-Charge Tunneling in Codoped Nanodevices

This document analyzes the research paper “Single-Charge Tunneling in Codoped Silicon Nanodevices” to extract key technical specifications and align them with 6CCVD’s advanced MPCVD diamond material solutions, focusing on applications in quantum electronics.

Executive Summary

The research successfully demonstrates single-charge tunneling (SET) and band-to-band tunneling (BTBT) phenomena in highly codoped Silicon-on-Insulator (SOI) nanodevices (diodes and FETs).

Core Achievement: Observation of Coulomb diamonds and Negative Differential Conductance (NDC) peaks, attributed to dopant-induced Quantum Dots (QDs) formed by the random distribution and compensation of Phosphorus (P) donors and Boron (B) acceptors.
Material Platform: Devices were fabricated in ultra-thin SOI layers (10 ± 5 nm active thickness) using CMOS-compatible techniques.
Operating Conditions: Single-electron transport features were clearly resolved at cryogenic temperatures (T ≈ 8.5 K).
Key Mechanism: Codoping enhances the probability of forming isolated QD clusters, promoting SET transport, which is critical for future nanoscale quantum electronics.
6CCVD Value Proposition: While this study uses Si, 6CCVD specializes in MPCVD diamond (SCD/PCD/BDD). Diamond offers a superior platform for extending this research, providing an ultra-wide bandgap and stable quantum defects (like NV centers or B-dopant QDs) capable of robust SET operation at room temperature, overcoming the cryogenic limitations of Si.

Technical Specifications

The following hard data points were extracted from the experimental results and fabrication parameters:

Parameter	Value	Unit	Context
P-Donor Concentration (N_D)	2.0 x 10²⁰	cm^-3	Codoped SOI-FET active channel
B-Acceptor Concentration (N_A)	0.5 x 10²⁰	cm^-3	Codoped SOI-FET active channel
Active Si Layer Thickness	10 ± 5	nm	Thinned SOI layer
Buried Oxide (BOX) Thickness	150 - 200	nm	Electrical isolation layer
Gate Oxide (t_ox) Thickness	10 ± 1	nm	Thermally grown SiO₂
Channel Length (L)	≈ 100	nm	Final SOI-FET dimension
Channel Width (W)	≈ 30	nm	Final SOI-FET dimension
Operating Temperature (T)	8.5 ± 0.5	K	Low-temperature electrical characterization
Thermal Energy (k_BT)	≈ 0.7	meV	Energy scale at measurement temperature
Coulomb Blockade Period (AVG1)	0.084 ± 0.005	V	Larger QD path (SOI-FET)
Coulomb Blockade Period (AVG2)	0.038 ± 0.002	V	Smaller QD path (SOI-FET)
Estimated QD Area (A_QD1)	≈ 1300	nm²	Based on C_G1 = 2.3 aF
Estimated QD Area (A_QD2)	≈ 700	nm²	Based on C_G2 = 4.5 aF

Key Methodologies

The devices were fabricated using a CMOS-compatible process flow on SOI substrates, emphasizing precise control over doping and nanoscale patterning.

Substrate Preparation: Started with SOI layers (50-70 nm Si / 150-200 nm BOX / p-type Si(100)).
Thinning: Sacrificial oxidation (dry oxidation at 900-950 °C) and diluted-HF etching reduced the active Si layer thickness to the target 10 ± 5 nm.
Surface Passivation: An ultrathin SiO₂ layer (~1.0 ± 0.5 nm) was thermally grown at 650 °C to protect the surface during subsequent doping.
Codoping Sequence (P then B):
- P-Doping: P₂O₅ spin-coated source; pre-deposition at 600 °C (N₂); followed by high-temperature drive-in (800 °C to 1050 °C).
- B-Doping: B₂O₃ spin-coated source; pre-deposition at 600 °C (O₂); followed by high-temperature drive-in (800 °C to 1050 °C).
- Note: Diodes used SiO₂ and Si₃N₄ masks for selective doping; FETs used uniform, non-selective doping across the entire Si layer.
Nano-Patterning: Electron Beam Lithography (EBL) defined the active regions, followed by Reactive Ion Etching (RIE) to achieve abrupt side walls and nanoscale dimensions (L ≈ 100 nm, W ≈ 30 nm).
Gate and Electrode Formation: Gate oxide (t_ox ≈ 10 nm) was thermally grown. Al electrodes (200-300 nm) were deposited via vacuum evaporation and lift-off.
Measurement: Electrical characteristics were measured in a vacuum chamber at T ≈ 8.5 K using a semiconductor precision parameter analyzer.

6CCVD Solutions & Capabilities

The research demonstrates the potential of highly compensated, doped semiconductors for single-charge quantum devices. 6CCVD provides MPCVD diamond materials that offer significant performance advantages over silicon for replicating and advancing this type of quantum research.

Applicable Materials

To replicate or extend the dopant-induced Quantum Dot (QD) research presented, 6CCVD recommends the following materials, leveraging diamond’s superior electronic and thermal properties:

Boron-Doped Diamond (BDD) Films: Ideal for achieving the high doping concentrations (up to 10²⁰ cm^-3) and compensated regimes necessary for QD formation, similar to the Si devices. BDD offers metallic or semiconducting properties depending on concentration, providing a robust platform for high-current quantum transport studies.
Optical Grade Single Crystal Diamond (SCD): Recommended for research focusing on isolated quantum defects (e.g., Nitrogen-Vacancy or NV centers) which function as highly stable QDs, enabling SET studies at room temperature—a major advantage over the 8.5 K requirement for the Si devices.
Ultra-Thin SCD/PCD Wafers: 6CCVD can supply SCD or PCD films with thicknesses ranging from 0.1 µm (100 nm) to 500 µm, allowing researchers to precisely engineer quantum confinement effects in the active layer, surpassing the limitations of the 10 nm Si film used in the paper.

Customization Potential

The paper relies on precise nanoscale dimensions and specific contact materials (Al). 6CCVD offers comprehensive customization services to meet these stringent requirements:

Research Requirement	6CCVD Customization Capability
Custom Dimensions: The paper used small, patterned active areas.	6CCVD provides custom plates and wafers up to 125 mm (PCD) and precision laser cutting services for defining complex micro- and nano-scale geometries on diamond.
Active Layer Thickness: The Si layer was thinned to 10 nm.	We offer SCD and PCD films with thickness control from 0.1 µm to 500 µm, enabling precise control over quantum confinement.
Metalization: The devices used Al electrodes.	6CCVD offers in-house metalization services, including deposition of Au, Pt, Pd, Ti, W, and Cu stacks, ensuring optimal ohmic contact formation for diamond devices. We can engineer multi-layer stacks (e.g., Ti/Pt/Au) for specific adhesion and contact resistance requirements.
Surface Quality: Low roughness (Ra < 1nm) is critical for minimizing accidental QDs.	Our advanced polishing achieves ultra-low roughness: Ra < 1 nm for SCD and Ra < 5 nm for inch-size PCD, ensuring that observed quantum phenomena are dopant-induced, not roughness-induced.

Engineering Support

6CCVD’s in-house PhD team specializes in the material science and defect engineering of MPCVD diamond. We can assist researchers transitioning from silicon to diamond platforms for single-charge tunneling and quantum information projects.

Our expertise includes:

Material selection and optimization for specific doping regimes (e.g., highly compensated BDD for QD formation).
Guidance on achieving stable, room-temperature quantum operation using diamond defects.
Consultation on thermal management, leveraging diamond’s exceptional thermal conductivity to handle high power densities inherent in nanoscale devices.

For custom specifications or material consultation, visit 6ccvd.com or contact our engineering team directly.

View Original Abstract

Silicon (Si) nano-electronics is advancing towards the end of the Moore’s Law, as gate lengths of just a few nanometers have been already reported in state-of-the-art transistors. In the nanostructures that act as channels in transistors or depletion layers in pn diodes, the role of dopants becomes critical, since the transport properties depend on a small number of dopants and/or on their random distribution. Here, we present the possibility of single-charge tunneling in codoped Si nanodevices formed in silicon-on-insulator films, in which both phosphorus (P) donors and boron (B) acceptors are introduced intentionally. For highly doped pn diodes, we report band-to-band tunneling (BTBT) via energy states in the depletion layer. These energy states can be ascribed to quantum dots (QDs) formed by the random distribution of donors and acceptors in such a depletion layer. For nanoscale silicon-on-insulator field-effect transistors (SOI-FETs) doped heavily with P-donors and also counter-doped with B-acceptors, we report current peaks and Coulomb diamonds. These features are ascribed to single-electron tunneling (SET) via QDs in the codoped nanoscale channels. These reports provide new insights for utilizing codoped silicon nanostructures for fundamental applications, in which the interplay between donors and acceptors can enhance the functionalities of the devices.

Tech Support

Original Source

DOI: https://doi.org/10.3390/nano13131911

References

1949 - Electrical properties of pure silicon and silicon alloys containing boron and phosphorus [Crossref]
1965 - Cramming more components onto integrated circuits
2005 - The end of CMOS scaling: Toward the introduction of new materials and structural changes to improve MOSFET performance [Crossref]
2005 - Enhancing semiconductor device performance using ordered dopant arrays [Crossref]
2010 - Nanowire transistors without junctions [Crossref]
2006 - Transport spectroscopy of a single dopant in a gated silicon nanowire [Crossref]
2008 - Gate-induced quantum-confinement transition of a single dopant atom in a silicon FinFET [Crossref]
2010 - Single-electron transport through single dopants in a dopant-rich environment [Crossref]