Normally-off Hydrogen-Terminated Diamond Field-Effect Transistor with SnOx Dielectric Layer Formed by Thermal Oxidation of Sn

At a Glance

Metadata	Details
Publication Date	2022-07-21
Journal	Materials
Authors	Shi He, Yanfeng Wang, Genqiang Chen, Juan Wang, Qi Li
Institutions	Xi’an Jiaotong University
Citations	3
Analysis	Full AI Review Included

Technical Documentation & Analysis: Normally-off H-Diamond FET with SnO_x Dielectric

This document analyzes the research detailing the fabrication of a normally-off hydrogen-terminated diamond Field-Effect Transistor (FET) utilizing a thermally oxidized SnO_x dielectric layer. The high effective mobility (92.5 cm²V⁻¹s⁻¹) achieved validates the quality of the H-diamond interface and the potential of MPCVD diamond for next-generation power and high-frequency electronics.

Executive Summary

The following points summarize the key achievements and material requirements of the analyzed research:

Device Achievement: Successful fabrication of a normally-off (enhancement-mode) H-diamond FET, crucial for system safety and energy saving in power electronics.
Dielectric Innovation: SnO_x film formed by simple, low-temperature thermal oxidation of deposited Sn (100 °C for 24 hours) was used as the gate dielectric.
High Performance: The device demonstrated a high effective hole mobility (µ_eff) of 92.5 cm²V⁻¹s⁻¹, suggesting a high-quality interface between the SnO_x and the H-diamond 2DHG channel.
Current Density: A maximum drain current density (I_DMAX) of -21.9 mA/mm was achieved at V_GS = -5 V and V_DS = -10 V.
Low Leakage: The SnO_x film provided excellent insulation, resulting in a low maximum gate leakage current density of 1.6 x 10⁻⁴ A/cm² at -8.0 V.
Material Foundation: The device relies on high-quality, single-crystal diamond epitaxial layers grown via MPCVD, confirming diamond’s role as a superior wide band gap semiconductor.

Technical Specifications

The following hard data points were extracted from the device characterization and fabrication process:

Parameter	Value	Unit	Context
Substrate Material	IIb (100)	N/A	HPHT Single Crystal Diamond
Epitaxial Thickness	300	nm	H-diamond layer grown by MPCVD
MPCVD Growth Temperature	850	°C	For H-diamond epitaxial layer
Dielectric Formation Temp.	100	°C	Thermal oxidation of Sn film (24 h)
Maximum Drain Current (I_DMAX)	-21.9	mA/mm	At V_GS = -5 V, V_DS = -10 V
Effective Mobility (µ_eff)	92.5	cm²V⁻¹s⁻¹	Calculated from R_ON plot
Threshold Voltage (V_TH)	-0.50	V	Normally-off operation achieved
Maximum Capacitance (C_ox)	0.207	µF/cm²	Measured at 5 MHz
Max Leakage Current Density (J)	1.6 x 10⁻⁴	A/cm²	At -8.0 V gate bias
Fixed Charge Density (Q_f)	4.5 x 10¹¹	cm⁻²	In SnO_x insulator
Trapped Charge Density (Q_t)	2.39 x 10¹²	cm⁻²	Calculated from C-V hysteresis
Gate Length (L_G)	8	µm	Device dimension
Gate Width (W_G)	100	µm	Device dimension

Key Methodologies

The fabrication process relied heavily on precise MPCVD growth and controlled surface termination, followed by low-temperature dielectric formation:

Substrate Cleaning: HPHT diamond substrate (3 x 3 x 0.5 mm³) was cleaned using hot mixed acid (H₂SO₄:HNO₃:HClO₄) and mixed alkali (NH₄OH:H₂O₂:H₂O) solutions.
MPCVD Preparation: Substrate was treated with hydrogen plasma (H-plasma) for 20 minutes in the MPCVD chamber to remove surface contamination.
Epitaxial Growth: H-diamond epitaxial layer (300 nm thick) was grown via MPCVD at 850 °C and 70 Torr, using H₂ (500 sccm) and CH₄ (5 sccm).
H-Termination: Post-growth, the sample received an additional 10 minutes of H-plasma treatment, followed by 5 hours of air exposure to generate the 2D hole gas (2DHG).
Ohmic Contact Deposition: Au (100 nm thick) source and drain electrodes were deposited using photolithography and Electron Beam (EB) evaporation.
Channel Isolation: UV/ozone irradiation was used to isolate the active device areas.
Dielectric Deposition & Oxidation: A 5 nm Sn film was deposited via EB evaporation, followed by thermal oxidation on a hot stage at 100 °C for 24 hours in air to form the SnO_x dielectric layer.
Gate Metalization: A 120 nm Al gate electrode was deposited directly onto the SnO_x layer using a self-aligned process.

6CCVD Solutions & Capabilities

The successful fabrication of this high-performance H-diamond FET confirms the viability of diamond for advanced electronics. 6CCVD is uniquely positioned to supply the high-quality materials and custom engineering services required to replicate, scale, and advance this research.

Applicable Materials

To replicate and extend this research, 6CCVD recommends the following materials, which meet or exceed the quality of the substrate used in the study:

Optical Grade Single Crystal Diamond (SCD): Required for the high-quality epitaxial growth of the H-diamond layer. Our SCD substrates offer superior crystalline quality compared to standard HPHT, minimizing defects that could scatter the 2DHG carriers.
Custom SCD Epitaxial Layers: 6CCVD specializes in growing custom SCD layers (0.1 µm to 500 µm thickness) under precise MPCVD conditions (e.g., 850 °C, 70 Torr) necessary for optimal H-termination and 2DHG formation.
Ultra-Smooth Polishing: Achieving high mobility (92.5 cm²V⁻¹s⁻¹) is highly dependent on surface quality. 6CCVD guarantees SCD surfaces with a roughness of Ra < 1 nm, ensuring minimal interface scattering for the 2DHG channel.

Customization Potential for Scaling and Integration

The research utilized a small 3 x 3 mm³ substrate. 6CCVD offers the necessary scaling and integration services to move this technology toward commercial viability:

Research Requirement	6CCVD Customization Solution	Technical Advantage
Small Substrate Size (3x3 mm³)	Large Area SCD & PCD Wafers	Supply SCD up to 10x10 mm or Polycrystalline Diamond (PCD) wafers up to 125 mm in diameter for high-volume manufacturing and scaling studies.
Complex Metal Stack (Au/Sn/Al)	In-House Custom Metalization	We offer internal deposition of Au, Ti, Pt, Pd, W, and Cu. Researchers can integrate the complex Sn/SnO_x/Al stack onto our H-terminated surfaces, reducing external processing steps and contamination risk.
Epitaxial Thickness Control	Precision MPCVD Growth	Guaranteed thickness control from 0.1 µm to 500 µm for SCD and PCD, allowing precise tuning of the active layer depth for optimized device performance.
Substrate Thickness	Custom Substrates up to 10 mm	Supply substrates up to 10 mm thick for robust handling or specific thermal management requirements (e.g., heat spreading in high-power FETs).

Engineering Support

6CCVD’s in-house team of PhD material scientists and engineers provides expert consultation for advanced diamond device development:

Interface Optimization: Assistance with selecting optimal SCD crystal orientation and surface preparation techniques to maximize 2DHG density and mobility for normally-off FET projects.
Dielectric Integration: Support for integrating novel dielectric materials (like SnO_x, HfO₂, or Al₂O₃) onto H-terminated diamond surfaces, focusing on minimizing fixed and trapped charge densities (Q_f and Q_t).
Thermal Management: Consultation on utilizing diamond’s exceptional thermal conductivity (22 W K⁻¹cm⁻¹) for high-power applications, ensuring device reliability and longevity.

For custom specifications or material consultation, visit 6ccvd.com or contact our engineering team directly.

View Original Abstract

SnOx films were deposited on a hydrogen-terminated diamond by thermal oxidation of Sn. The X-ray photoelectron spectroscopy result implies partial oxidation of Sn film on the diamond surface. The leakage current and capacitance-voltage properties of Al/SnOx/H-diamond metal-oxide-semiconductor diodes were investigated. The maximum leakage current density value at −8.0 V is 1.6 × 10−4 A/cm2, and the maximum capacitance value is measured to be 0.207 μF/cm2. According to the C-V results, trapped charge density and fixed charge density are determined to be 2.39 × 1012 and 4.5 × 1011 cm−2, respectively. Finally, an enhancement-mode H-diamond field effect transistor was obtained with a VTH of −0.5 V. Its IDMAX is −21.9 mA/mm when VGS is −5, VDS is −10 V. The effective mobility and transconductance are 92.5 cm2V−1 s−1 and 5.6 mS/mm, respectively. We suspect that the normally-off characteristic is caused by unoxidized Sn, whose outermost electron could deplete the hole in the channel.

Tech Support

Original Source

DOI: https://doi.org/10.3390/ma15145082

References

2022 - An enhanced two-dimensional hole gas (2DHG) C-H diamond with positive surface charge model for advanced normally-off MOSFET devices [Crossref]
2006 - Diamond FET using high-quality polycrystalline diamond with fT of 45 GHz and fmax of 120 GHz [Crossref]
2022 - Over 1 A/mm drain current density and 3.6 W/mm output power density in 2DHG diamond MOSFETs with highly doped regrown source/drain [Crossref]
2021 - 345-MW/cm2 2608-V NO₂ p-Type Doped Diamond MOSFETs with an Al₂O₃ Passivation Overlayer on Heteroepitaxial Diamond [Crossref]
2021 - Progress in semiconductor diamond photodetectors and MEMS sensors [Crossref]
2019 - Enhanced ultraviolet absorption in diamond surface via localized surface plasmon resonance in palladium nanoparticles [Crossref]
2019 - Diamond Schottky barrier diodes with floating metal rings for high breakdown voltage [Crossref]
2021 - Surface transfer doping of diamond: A review [Crossref]
1996 - Hydrogen-terminated diamond surfaces and interfaces [Crossref]