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Divide-and-conquer verification method for noisy intermediate-scale quantum computation

MetadataDetails
Publication Date2022-07-07
JournalQuantum
AuthorsYuki Takeuchi, Yasuhiro Takahashi, Tomoyuki Morimae, Seiichiro Tani
InstitutionsGunma University, Kyoto University
Citations8
AnalysisFull AI Review Included

Technical Documentation: Efficient Verification for NISQ Computation using Divide-and-Conquer Methods

Section titled ā€œTechnical Documentation: Efficient Verification for NISQ Computation using Divide-and-Conquer Methodsā€

Reference Paper: Divide-and-conquer verification method for noisy intermediate-scale quantum computation (Takeuchi et al., arXiv:2109.14928v3)


This research introduces a highly efficient method for verifying the output fidelity of Noisy Intermediate-Scale Quantum (NISQ) computations, a critical challenge for current quantum hardware development.

  • Core Achievement: Proposes a divide-and-conquer verification protocol that drastically reduces the sample complexity required to estimate the fidelity ($\langle\psi_t|\rho_{out}|\psi_t\rangle$).
  • Complexity Reduction: The method achieves polynomial sample complexity, $O(2^{12D} / \epsilon^6)$, where $D$ is the circuit denseness ($D = O(\log n)$ for sparse chips). This overcomes the exponential $O(2^n)$ requirement of direct fidelity estimation.
  • Target Application: Specifically designed for shallow (logarithmic-depth) quantum circuits implemented on sparse quantum computing chips (e.g., planar graph architectures).
  • Methodology: Utilizes generalized stabilizer operators and decomposes the verification circuit into smaller, manageable (m+1)-qubit and (n-m+1)-qubit measurement circuits.
  • Hardware Requirement: The protocol demands extremely high-fidelity quantum gates, requiring the diamond norm distance between ideal and actual gates to be bounded by $\epsilon/4^{D+2}$.
  • Validation: Proof-of-principle experiment successfully performed on the IBM Manila 5-qubit superconducting chip, demonstrating practical performance.

The following hard data points summarize the performance and constraints derived from the verification protocol:

ParameterValueUnitContext
Target Fidelity Accuracy (ε)0.1DimensionlessDesired verification accuracy.
Required Gate Precision (Diamond Norm)< ε / 4D+2DimensionlessUpper bound on error for (m+1)-qubit gates, critical for protocol success.
Worst-Case Sample Complexity (Copies of ρout)O(212D / ε6)CopiesRequired number of output state copies for verification. D = O(log n).
Experimental Qubit Count (n)4QubitsUsed for proof-of-principle experiment on IBM Manila.
Experimental Measurement Repetitions (T)1024TimesRepetitions for estimating each term in the fidelity calculation.
Experimental Fidelity Estimate (Fest)~ 0.789DimensionlessFidelity obtained using the divide-and-conquer method.
Direct Fidelity Estimate (F’est)~ 0.865DimensionlessFidelity obtained using direct Pauli measurement comparison.
Fidelity Difference (Fest - F’est)< 0.076

The verification method, summarized in Algorithm 1, relies on spatial and temporal decomposition of the quantum circuit:

  1. Qubit Partitioning (Spatial Division): The n-qubit system is divided into two sets, m and (n - m) qubits, minimizing the number of Controlled-Z (CZ) gates crossing the boundary (Denseness D).
  2. Unitary Decomposition: The target quantum circuit U is decomposed into a linear combination of tensor products of smaller m-qubit and (n - m)-qubit operators (U = Σ Qij).
  3. Generalized Stabilizer Operators: The fidelity $\langle\psi_t|\rho_{out}|\psi_t\rangle$ is estimated by measuring the expectation value of generalized stabilizer operators ŝk, which are products of gi = UZiU† operators.
  4. Time Division Technique: The complex (n+1)-qubit measurement circuit required for estimating Tr[ρoutŝk] is replaced by two smaller, independent (m+1)-qubit and (n-m+1)-qubit circuits.
  5. Identity Gate Replacement: This division is achieved by replacing the identity gate connecting the two sub-circuits with a combination of Pauli-basis measurements and preparations (Clifford operations Cl).
  6. Classical Post-Processing: The measurement outcomes from the smaller circuits are classically post-processed (averaged T1, T2, T3 times) to yield the final estimated fidelity Fest.

The efficient verification of NISQ devices, as demonstrated in this paper, places extreme demands on the underlying quantum hardware—specifically requiring ultra-low noise and high-fidelity gates. While the experiment used superconducting qubits, 6CCVD’s MPCVD diamond materials are essential for advancing solid-state quantum platforms (such as NV centers in diamond or SiC defects) that compete in the NISQ era.

Achieving the required gate precision (diamond norm < ε/4D+2) necessitates materials with unparalleled purity and surface quality, which 6CCVD delivers.

Research Requirement6CCVD Material SolutionTechnical Specification & Value Proposition
Ultra-High Coherence & Low NoiseOptical Grade Single Crystal Diamond (SCD)Essential for solid-state qubits (NV, SiC). 6CCVD provides SCD with ultra-low nitrogen concentration (< 1 ppb) and minimal strain, maximizing T2 coherence times necessary for high-fidelity, logarithmic-depth circuits.
Precision Substrate DimensionsCustom SCD/PCD PlatesWe offer custom dimensions for plates and wafers up to 125mm (PCD). SCD thicknesses range from 0.1µm to 500µm, allowing integration into complex quantum chip architectures.
Minimizing Surface DefectsUltra-Smooth PolishingVerification protocols are highly sensitive to gate errors. 6CCVD guarantees surface roughness (Ra) < 1nm for SCD and < 5nm for inch-size PCD, critical for minimizing surface noise and enabling high-resolution lithography.
Integrated Control & MeasurementIn-House Metalization ServicesThe verification method requires precise control and measurement circuitry. We offer custom deposition of Au, Pt, Pd, Ti, W, and Cu, supporting the integration of microwave lines or superconducting contacts directly onto the diamond substrate.
Conductive Diamond ApplicationsBoron-Doped Diamond (BDD)For future extensions of verification methods into quantum sensing or electrochemical applications, 6CCVD supplies BDD with tailored doping levels and thicknesses (0.1µm - 500µm).
Complex Engineering SupportExpert Consultation & Global LogisticsOur in-house PhD team provides authoritative engineering support for material selection, orientation, and surface preparation to meet the stringent requirements of NISQ verification projects. Global shipping (DDU default, DDP available) ensures timely delivery worldwide.

For custom specifications or material consultation, visit 6ccvd.com or contact our engineering team directly.

View Original Abstract

Several noisy intermediate-scale quantum computations can be regarded as logarithmic-depth quantum circuits on a sparse quantum computing chip, where two-qubit gates can be directly applied on only some pairs of qubits. In this paper, we propose a method to efficiently verify such noisy intermediate-scale quantum computation. To this end, we first characterize small-scale quantum operations with respect to the diamond norm. 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For logarithmic-depth quantum circuits on a sparse chip, <mml:math xmlns:mml=ā€œhttp://www.w3.org/1998/Math/MathMLā€&gt;&lt;mml:mi&gt;D&lt;/mml:mi&gt;&lt;/mml:math> is at most <mml:math xmlns:mml=ā€œhttp://www.w3.org/1998/Math/MathMLā€&gt;&lt;mml:mi&gt;O&lt;/mml:mi&gt;&lt;mml:mo stretchy=ā€œfalseā€>(</mml:mo><mml:mi>log</mml:mi><mml:mo>&amp;#x2061;</mml:mo><mml:mrow class=ā€œMJX-TeXAtom-ORDā€><mml:mi>n</mml:mi></mml:mrow><mml:mo stretchy=ā€œfalseā€>)</mml:mo></mml:math>, and thus <mml:math xmlns:mml=ā€œhttp://www.w3.org/1998/Math/MathMLā€&gt;&lt;mml:mi&gt;O&lt;/mml:mi&gt;&lt;mml:mo stretchy=ā€œfalseā€>(</mml:mo><mml:msup><mml:mi>D</mml:mi><mml:mn>3</mml:mn></mml:msup><mml:msup><mml:mn>2</mml:mn><mml:mrow class=ā€œMJX-TeXAtom-ORDā€><mml:mn>12</mml:mn><mml:mi>D</mml:mi></mml:mrow></mml:msup><mml:mo stretchy=ā€œfalseā€>)</mml:mo></mml:math> is a polynomial in <mml:math xmlns:mml=ā€œhttp://www.w3.org/1998/Math/MathMLā€&gt;&lt;mml:mi&gt;n&lt;/mml:mi&gt;&lt;/mml:math>. By using the IBM Manila 5-qubit chip, we also perform a proof-of-principle experiment to observe the practical performance of our method.