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Ultra-Fine Polishing Technique for Diamond Substrates and Its Application to Semiconductor Devices with Improved Heat Dissipation Performance

MetadataDetails
Publication Date2022-06-04
JournalJournal of the Japan Society for Precision Engineering
AuthorsShuichi HIZA, Akihisa Kubota
AnalysisFull AI Review Included

Technical Documentation & Analysis: Ultra-Fine Polishing of Diamond for High-Performance GaN HEMTs

Section titled “Technical Documentation & Analysis: Ultra-Fine Polishing of Diamond for High-Performance GaN HEMTs”

This technical documentation analyzes the research paper, “Ultra-Fine Polishing Technique for Diamond Substrates and Its Application to Semiconductor Devices with Improved Heat Dissipation Performance,” focusing on the material requirements and processing challenges that 6CCVD is uniquely positioned to solve.


This research successfully demonstrates the critical role of ultra-high precision diamond polishing in enabling high-performance GaN-on-diamond High Electron Mobility Transistors (HEMTs) for advanced thermal management applications.

  • Core Achievement: Successful fabrication and thermal validation of GaN HEMTs bonded to Mosaic Single Crystal Diamond (SCD) substrates.
  • Thermal Breakthrough: The GaN-on-diamond structure suppressed device temperature rise by approximately 1/3 compared to standard GaN-on-Si HEMTs under high power density (~10 W/mm).
  • Critical Requirement: Achieving extremely low surface roughness (Arithmetic Mean Roughness, Sa) of ~0.1 nm across the entire diamond surface, including grain boundaries, was essential for high-quality bonding.
  • Methodology: Two chemical-assisted polishing techniques—Transition Metal Plate/Oxidizing Agent and Oxide Plate/Thermal-Chemical Reaction—were validated for achieving sub-nanometer roughness on large-area diamond.
  • Scaling Potential: The use of Mosaic SCD (a form of Polycrystalline Diamond, PCD) confirms the feasibility of scaling this technology to inch-class large-area diamond wafers, addressing a key industry bottleneck.
  • Bonding Success: High-quality, integrated bonding was achieved using a surface-activated room-temperature method with an ultra-thin amorphous Si layer (< 10 nm).

The following hard data points were extracted from the research, highlighting the stringent material requirements for high-performance GaN-on-diamond integration.

ParameterValueUnitContext
Target Surface Roughness (Sa)< 0.1nmRequired for high-quality, low-thermal-resistance bonding
Achieved Sa (Transition Metal Method)0.11nmPolishing using Fe/Ni plate and H2O2
Achieved Sa (Oxide Plate Method)0.12nmPolishing using Sapphire/Quartz plate and heat/VUV
Reference Sa (Mechanical Polishing)0.32nmStandard mechanical finish prior to ultra-fine polishing
Substrate Type TestedMosaic SCD (PCD)N/AUsed to demonstrate large-area feasibility
Substrate Size Tested15 x 15mmSample size for polishing and bonding validation
Bonding Layer Thickness< 10nmAmorphous Si layer used for room-temperature bonding
HEMT Power Density~10W/mmOperating condition during thermal evaluation
Thermal Performance Improvement~1/3ReductionTemperature rise compared to GaN-on-Si reference device

The research focused on chemical-assisted polishing techniques to overcome the mechanical limitations of diamond processing, followed by advanced bonding integration.

  1. Chemical-Assisted Polishing (Transition Metal Plate):

    • Mechanism: A transition metal plate (e.g., Fe or Ni) is immersed in an oxidizing agent (e.g., hydrogen peroxide, H2O2).
    • Process: The reaction generates highly reactive OH radicals (OH·).
    • Result: The OH radicals chemically modify and remove carbon atoms from the diamond surface, achieving Sa = 0.11 nm.
  2. Thermal-Chemical Polishing (Oxide Plate):

    • Mechanism: An oxide plate (e.g., Quartz or Sapphire) is heated and pressed against the diamond substrate.
    • Process: High temperature induces a thermal-chemical reaction, primarily dehydration condensation between OH groups on the oxide surface and the diamond surface (Cdiamond-O-Siquartz bond formation).
    • Enhancement: VUV light or ozone gas irradiation can be used to promote efficient OH termination on the oxide surface, improving polishing rate and quality (Sa = 0.12 nm).
  3. Device Integration and Bonding:

    • Substrate Preparation: GaN layers were grown on Si/SiC, devices were fabricated, and the growth substrate was removed and polished via Chemical Mechanical Polishing (CMP).
    • Bonding Method: Surface-activated room-temperature bonding was employed.
    • Interface: An ultra-thin amorphous Si layer (< 10 nm) was inserted between the highly polished diamond and the GaN layer to facilitate robust, low-thermal-resistance integration.

The successful replication and scaling of this high-performance GaN-on-diamond technology rely entirely on the availability of large-area, ultra-smooth diamond substrates. 6CCVD is an ideal partner to supply the necessary materials and processing services.

The research utilized Mosaic SCD (a form of PCD) to demonstrate large-area feasibility. 6CCVD offers materials optimized for this application:

  • Optical Grade SCD: For the highest thermal conductivity and lowest defect density, 6CCVD provides Single Crystal Diamond (SCD) plates up to 500 ”m thick, guaranteeing Ra < 1 nm polishing standard.
  • High-Purity PCD: To meet the demand for large-area, inch-class substrates, 6CCVD offers Polycrystalline Diamond (PCD) wafers up to 125 mm in diameter, with polishing capability achieving Ra < 5 nm (inch-size). This directly supports the paper’s goal of scaling to “inch-class” wafers.

The integration of GaN HEMTs requires precise dimensions and often involves metal layers for subsequent processing or bonding.

Requirement from Research6CCVD CapabilityBenefit to Customer
Large Area SubstratesPlates/wafers up to 125 mm (PCD)Enables scaling beyond the 15 mm x 15 mm samples tested, supporting mass production goals.
Ultra-Fine PolishingCustom polishing services (Ra < 1 nm SCD)While the paper achieved Sa ~0.1 nm, 6CCVD can provide the necessary starting material with guaranteed sub-nanometer roughness for advanced bonding.
Bonding Interface PreparationInternal Metalization capability6CCVD can deposit custom metal stacks (Au, Pt, Pd, Ti, W, Cu) required for subsequent bonding, adhesion, or electrical contact layers, streamlining the device fabrication process.
Thickness ControlSCD/PCD thickness from 0.1 ”m to 500 ”mAllows engineers to select the optimal diamond thickness for thermal spreading efficiency versus cost and handling requirements.

The successful integration of GaN and diamond relies on precise material selection and interface engineering.

  • Material Selection: 6CCVD’s in-house PhD team specializes in MPCVD diamond growth and processing. We can assist researchers in selecting the optimal diamond grade (SCD vs. PCD) and thickness for similar GaN-on-Diamond HEMT projects, ensuring maximum thermal performance and structural integrity.
  • Global Logistics: We offer reliable global shipping (DDU default, DDP available) to ensure sensitive, highly polished diamond substrates reach your facility safely and efficiently.

For custom specifications or material consultation, visit 6ccvd.com or contact our engineering team directly.