High-mobility p-channel wide-bandgap transistors based on hydrogen-terminated diamond/hexagonal boron nitride heterostructures
At a Glance
Section titled âAt a Glanceâ| Metadata | Details |
|---|---|
| Publication Date | 2021-12-23 |
| Journal | Nature Electronics |
| Authors | Yosuke Sasama, Taisuke Kageura, Masataka Imura, Kenji Watanabe, Takashi Taniguchi |
| Institutions | University of Tsukuba, National Institute for Materials Science |
| Citations | 154 |
| Analysis | Full AI Review Included |
Technical Documentation & Analysis: High-Mobility p-Channel Diamond FETs
Section titled âTechnical Documentation & Analysis: High-Mobility p-Channel Diamond FETsâExecutive Summary
Section titled âExecutive SummaryâThis research demonstrates a breakthrough in wide-bandgap semiconductor electronics by fabricating high-performance, normally-off p-channel Field-Effect Transistors (FETs) using hydrogen-terminated Single Crystal Diamond (SCD) and a hexagonal Boron Nitride (h-BN) gate insulator.
- Record Hole Mobility: Achieved the highest room-temperature Hall mobility ($680 \text{ cm}^2\text{V}^{-1}\text{s}^{-1}$) reported for any p-channel wide-bandgap semiconductor FET (surpassing GaN and SiC).
- Normally-Off Operation: Demonstrated enhancement-mode (normally-off) behavior with a threshold voltage ($V_{\text{th}}$) of $-0.99 \text{ V}$ and an exceptionally high on/off ratio (>108).
- Low On-Resistance: Achieved the lowest reported sheet resistance ($1.4 \text{ k}\Omega$) compatible with normally-off diamond FETs, crucial for low-loss switching applications.
- Novel Fabrication Method: Performance gains stem from an air-free vacuum transfer process, which drastically reduces atmospheric surface acceptors, minimizing carrier scattering and enhancing mobility.
- High Current Density: Demonstrated a gate-length-normalized maximum on-current of $1600 \text{ ”m mA mm}^{-1}$, the highest reported for p-channel wide-bandgap FETs.
- Material Foundation: The device relies on high-quality, hydrogen-terminated (111) Single Crystal Diamond (SCD) substrates.
Technical Specifications
Section titled âTechnical SpecificationsâThe following key performance metrics were extracted from the room-temperature electrical characterization of the h-BN/diamond FETs (Device C1).
| Parameter | Value | Unit | Context |
|---|---|---|---|
| Maximum Hall Mobility (RT) | 680 | cm2V-1s-1 | Highest reported for p-channel wide-bandgap FETs |
| Maximum Hall Mobility (150 K) | >1000 | cm2V-1s-1 | Indicates phonon scattering dominance at higher T |
| Minimum Sheet Resistance (Rsheet) | 1.4 | kΩ | Lowest reported for normally-off diamond FETs |
| Maximum Normalized On-Current (LGImax/WG) | 1600 | ”m mA mm-1 | Highest reported for p-channel wide-bandgap FETs |
| On/Off Ratio | >108 | Ratio | Essential for low-loss switching |
| Threshold Voltage (Vth) | -0.99 | V | Confirms normally-off (Enhancement) mode |
| Interface Trap Density (Dit) | 6.8 x 1011 | cm-2eV-1 | Low density achieved via h-BN/air-free process |
| Gate Insulator Thickness (h-BN) | 24 | nm | Used for devices C1 and C2 |
| Substrate Material | IIa-type SCD | Crystal | (111) orientation |
Key Methodologies
Section titled âKey MethodologiesâThe high performance of the FETs is directly linked to the precise control of the diamond surface and interface quality, achieved through the following steps:
- Substrate Selection & Cleaning: IIa-type Single Crystal Diamond (SCD) substrates of (111) orientation were used, followed by rigorous cleaning in hydrofluoric acid and a sulfuric/nitric acid mixture at $200 \text{ °C}$.
- Ohmic Contact Formation: Ti/Pt (5 nm / 5 nm) electrodes were deposited via E-beam lithography and annealed to form stable TiC ohmic contacts.
- Hydrogen Termination: The diamond surface was hydrogenated using microwave-plasma-assisted CVD (H2 gas flow: 500 sccm; T: $600 \text{ °C}$ - $670 \text{ °C}$).
- Air-Free Transfer: The hydrogen-terminated diamond was transferred directly from the CVD chamber to an Ar-filled glove box using a custom vacuum suitcase (pressure < $10^{-7} \text{ Torr}$) to prevent exposure to atmospheric acceptors.
- Gate Insulator Lamination: Cleaved h-BN single crystal (24 nm thick) was dry-transferred onto the H-terminated diamond surface within 3 hours of CVD transfer, ensuring minimal contamination.
- Gate Electrode & Isolation: Graphite crystal (Kish graphite) was transferred as the gate electrode. Plasma etching (N2, O2, CHF3) defined the Hall-bar structure and converted exposed H-terminated diamond to insulating oxygen-terminated diamond for device isolation.
- Lead Metalization: Ti/Au (10 nm / 100 nm) was deposited for leads and bonding pads.
6CCVD Solutions & Capabilities
Section titled â6CCVD Solutions & CapabilitiesâThe fabrication of these record-breaking diamond FETs requires ultra-high-quality SCD material, precise dimensional control, and advanced metalization capabilitiesâall core competencies of 6CCVD. We are positioned to supply the foundational materials and custom engineering services necessary to replicate and scale this research for commercial applications, particularly in high-power and high-frequency complementary circuits.
| Research Requirement | 6CCVD Solution & Capability | Technical Advantage for Customer |
|---|---|---|
| Material: IIa-type (111) Single Crystal Diamond (SCD) | Optical Grade SCD Wafers: We supply high-purity SCD material in custom orientations, including (111), essential for maximizing surface conductivity and intrinsic hole mobility. | Ensures the highest intrinsic hole mobility potential (>2000 cm2V-1s-1 in bulk) required to push device performance beyond current wide-bandgap limits. |
| Dimensions & Scaling: Small substrates (2x2 mm) used; future scaling required. | Custom Dimensions & Thickness: SCD plates available from $0.1 \text{ ”m}$ up to $500 \text{ ”m}$ thick, and substrates up to $10 \text{ mm}$ thick. PCD wafers available up to $125 \text{ mm}$ diameter for eventual high-volume manufacturing. | Supports both R&D prototyping and the transition to large-area, high-output power device fabrication. |
| Surface Quality: Atomically flat interface required to reduce defects (P. 14) and surface roughness scattering (P. 36). | Ultra-Low Roughness Polishing: SCD surfaces polished to Ra < 1 nm. Inch-size PCD polished to Ra < 5 nm. | Minimizes surface roughness scattering (a key mobility limiter), crucial for achieving phonon-limited mobility at room temperature and below. |
| Metalization: Complex stack of Ti/Pt (ohmic) and Ti/Au (leads). | In-House Custom Metalization: Standard deposition of Au, Pt, Pd, Ti, W, and Cu. We offer precise, multi-layer deposition to optimize TiC ohmic contact formation and bonding pad integrity. | Enables rapid prototyping and optimization of critical interfaces, ensuring low contact resistance ($R_{\text{CS}}$ and $R_{\text{CD}}$) which limits overall drain current (P. 38). |
| Application Focus: High-frequency, high-output p-channel FETs for complementary circuits (Diamond/GaN integration). | Expert Engineering Support: Our in-house PhD team specializes in MPCVD diamond growth, surface termination, and material selection for advanced power and RF applications. | Provides consultation on optimizing hydrogenation recipes and selecting the ideal SCD grade to maximize performance in complementary wide-bandgap systems. |
For custom specifications or material consultation, visit 6ccvd.com or contact our engineering team directly.