Influence of the DLC Passivation Conductivity on the Performance of Silicon High-Power Diodes Over an Extended Temperature Range

At a Glance

Metadata	Details
Publication Date	2021-01-01
Journal	IEEE Journal of the Electron Devices Society
Authors	Luigi Balestra, Susanna Reggiani, A. Gnudi, Elena Gnani, J. Dobrzynska
Institutions	ABB (Switzerland), Czech Technical University in Prague
Citations	3
Analysis	Full AI Review Included

Technical Documentation & Analysis: Diamond Passivation for High-Power Devices

Executive Summary

This documentation analyzes the application of Diamond-Like Carbon (DLC) as a passivation layer in 4.5 kV Silicon power diodes, focusing on the material science implications for high-temperature performance and leakage current ($I_{OFF}$).

Application Focus: Optimization of Junction Termination (JT) passivation in large-area 4.5 kV Silicon fast-recovery diodes to enhance blocking stability and maximum junction temperature ($T_{jmax}$).
Performance Challenge: Experimental measurements of $I_{OFF}$ between 300 K and 413 K showed an unusual deviation from the standard Arrhenius law, indicating that the DLC layer conductivity significantly contributes to leakage current.
Material Comparison: Boron-Doped DLC (BDLC) and Nitrogen-Doped DLC (NDLC) were investigated, showing that doping type and concentration influence the Si/DLC interface properties and charge transport.
Modeling Validation: A comprehensive TCAD model was developed, incorporating two-layer DLC structure, Gaussian Density of States (G-DOS) for hopping transport, and thermionic emission at the Si/DLC interface.
Key Mechanism: The model successfully correlated the temperature dependence of $I_{OFF}$ to the interplay between silicon thermal generation and the conductivity features (Poole-Frenkel hopping) of the semi-insulating DLC layer.
6CCVD Value Proposition: While DLC is used here, 6CCVD offers superior, highly crystalline CVD diamond (SCD and BDD) materials, which provide vastly improved thermal management and tunable electrical properties, essential for next-generation high-power electronics.

Technical Specifications

Data extracted from the research paper, focusing on device parameters and DLC material properties.

Parameter	Value	Unit	Context
Device Type	4.5	kV	Fast-recovery power diode
Reverse Bias Voltage (Test)	4000	V	Used for TCAD potential contour plots
Experimental Temperature Range	300 to 413	K	Extended industrial range (27 °C to 140 °C)
Maximum Junction Temperature ($T_{jmax}$)	448	K	Upper limit for industrial Si chips
Total DLC Thickness (NDLC)	98	nm	Measured
Total DLC Thickness (BDLC)	140	nm	Measured
DLC1 Interface Layer Thickness	70	nm	Low carrier mobility layer
DLC Energy Gap ($E_{g}$)	1.36	eV	Assumed for TCAD model
Boron Doping Concentration (BDLC)	1e16	cm^-3	Optimized TCAD parameter
Nitrogen Doping Concentration (NDLC)	1e17	cm^-3	Optimized TCAD parameter
Poole-Frenkel Activation Energy ($E_{a}$) (BDLC)	0.23	eV	Hopping carrier activation energy
Poole-Frenkel Activation Energy ($E_{a}$) (NDLC)	0.16	eV	Hopping carrier activation energy
Relative Dielectric Constant ($\epsilon_{r}$) (NDLC)	4	-	TCAD parameter
Relative Dielectric Constant ($\epsilon_{r}$) (BDLC)	5.4	-	TCAD parameter

Key Methodologies

The experimental and simulation approach used to characterize the DLC passivation layer and its impact on diode performance.

Device Measurement: Leakage current ($I_{OFF}$) was measured on large-area 4.5 kV power diodes with negative bevels coated in doped DLC (BDLC and NDLC) across the temperature range of 300 K to 413 K.
TCAD Model Development: A 2D radial TCAD model was implemented using cylindrical coordinates to simulate the diode structure, including the DLC passivation layer directly contacting the silicon bevel edge.
DLC Layer Structure: The DLC passivation was modeled as a two-layer stack: DLC1 (interface layer, 70 nm thick, low mobility) and DLC2 (top layer, higher mobility).
Interface Calibration: MIS (Metal-Insulator-Semiconductor) test structures, featuring DLC on both p-type and n-type Si substrates, were used to rigorously calibrate parameters describing charge transport across the Si/DLC interface.
Charge Transport Modeling: The DLC bulk transport was modeled using the drift-diffusion model assuming two symmetric Gaussian Densities of States (G-DOSs) for hopping carriers. Thermionic emission was used to model carrier injection at the Si/DLC interface.
Polarization Effects: The ferroelectric model was incorporated into the TCAD setup to account for the permanent polarization ($P_{r}$) of the DLC layer, which influences the electrostatic field profile.

6CCVD Solutions & Capabilities

6CCVD specializes in high-quality MPCVD diamond, offering materials and services that exceed the capabilities of amorphous DLC used in this research, enabling superior performance for high-power semiconductor applications.

Applicable Materials for Replication and Extension

The research highlights the need for a robust, semi-insulating layer with tunable conductivity and excellent thermal properties. 6CCVD’s crystalline diamond materials offer significant advantages over the amorphous DLC used in the study.

Application Requirement	6CCVD Material Recommendation	Technical Advantage
Tunable Passivation/Field Plate	Boron-Doped Diamond (BDD)	BDD offers precise, stable, and tunable conductivity (from semi-insulating to metallic) far superior to doped DLC, allowing for optimized electric field shaping and breakdown voltage ($V_{BD}$) control.
High Thermal Management	Single Crystal Diamond (SCD)	SCD provides the highest thermal conductivity (> 2000 W/mK) for heat spreading, drastically lowering the effective $T_{j}$ and extending the Safe Operating Area (SOA) of the Si diode, a critical factor for high-power density.
High-Purity Insulating Layer	High-Purity SCD (Electronic Grade)	For applications requiring an ideal insulator (similar to the simulated SiO₂ case), high-purity SCD offers exceptional dielectric strength and stability across the required temperature range (300 K to 413 K).
Large-Area Heat Spreading	Polycrystalline Diamond (PCD)	We supply PCD wafers up to 125 mm diameter, ideal for use as robust, large-format heat spreaders in high-power modules, directly addressing the “large area power diode” context of the paper.

Customization Potential

The complexity of the DLC layer (two-layer stack, specific doping, custom metal contacts) demonstrates the need for highly customized material solutions. 6CCVD is uniquely positioned to meet these demands:

Custom Dimensions: While the paper used a circular discrete diode, 6CCVD can supply PCD plates up to 125 mm and SCD wafers up to 500 µm thick, allowing engineers to design next-generation large-area power modules.
Precision Thickness Control: We offer SCD and PCD layers with thickness control ranging from 0.1 µm to 500 µm, enabling precise engineering of insulating or conductive layers for bevel edge termination.
Advanced Metalization: The paper utilized Al/Pt electrodes for calibration. 6CCVD offers in-house metalization services including Au, Pt, Pd, Ti, W, and Cu, ensuring robust, high-temperature ohmic contacts necessary for power device integration.
Ultra-Low Roughness: For critical Si/Diamond interfaces, 6CCVD guarantees SCD polishing to Ra < 1 nm and inch-size PCD polishing to Ra < 5 nm, minimizing interface defects and improving charge transport characteristics.

Engineering Support

The successful TCAD modeling relied heavily on precise material parameters (G-DOS, $E_{a}$, $\epsilon_{r}$). 6CCVD’s in-house PhD team provides expert consultation to accelerate similar projects:

Material Selection for High $T_{jmax}$: We assist engineers in selecting the optimal diamond grade (SCD, PCD, BDD) to maximize thermal performance and extend the device SOA, directly addressing the goals of this research.
Electrical Parameter Tuning: Our team can provide guidance on achieving specific doping levels in BDD to replicate or improve upon the field-shaping effects demonstrated by the doped DLC layers.
Global Supply Chain: 6CCVD ensures reliable, global shipping (DDU default, DDP available) of custom diamond materials, supporting international research and industrial production timelines.

For custom specifications or material consultation, visit 6ccvd.com or contact our engineering team directly.

View Original Abstract

The diamond-like carbon (DLC) is important for passivation of junction termination in high power devices due to its excellent electrical, mechanical, and thermal properties. While the role of conductivity and polarization of the DLC layer on the blocking capability of a p-n junction has been explained recently, the thermal behavior still needs to be addressed. For this purpose, the diode leakage current was measured on large area power diodes with negative bevel coated by the DLC in a typical industrial range between 300 and 413 K. An unusual deviation from the expected Arrhenius law was experimentally observed. A predictive TCAD model, which incorporates the effect of the DLC layer, has been developed to study the impact of the DLC layer parameters on diode thermal performance. Both the electrostatic features and charge transport mechanisms through and along the DLC/Silicon interface have been modeled over a wide range of temperatures. Different DLC/Silicon doping combinations have been analyzed to explain the main effects determining the temperature dependence of diode leakage current and breakdown voltage. A complete validation of the TCAD approach has been achieved.

Tech Support

Original Source

DOI: https://doi.org/10.1109/jeds.2021.3073232

References

2007 - Semiconductor component having a pn junction and a passivation layer applied on a surface