A Valleytronic Diamond Transistor - Electrostatic Control of Valley Currents and Charge-State Manipulation of NV Centers
At a Glance
Section titled âAt a Glanceâ| Metadata | Details |
|---|---|
| Publication Date | 2020-12-18 |
| Journal | Nano Letters |
| Authors | Nattakarn Suntornwipat, Saman Majdi, Markus Gabrysch, Kiran Kumar Kovi, Viktor Djurberg |
| Institutions | Argonne National Laboratory, Element Six (United Kingdom) |
| Citations | 18 |
| Analysis | Full AI Review Included |
Valleytronic Diamond Transistor: Electrostatic Control and NV Center Manipulation
Section titled âValleytronic Diamond Transistor: Electrostatic Control and NV Center ManipulationâThis technical documentation analyzes the research demonstrating electrostatic control of valley-currents and charge state manipulation of Nitrogen-Vacancy (NV) centers in ultra-pure Single Crystal Diamond (SCD). This work validates diamond as a premier platform for valleytronics, quantum computing, and single-photon sources.
Executive Summary
Section titled âExecutive SummaryâThe following points summarize the core achievements and methodology of the valleytronic diamond transistor research:
- Core Achievement: Successful demonstration of all-electric, rapid electrostatic control over valley-currents in ultra-pure Single Crystal Diamond (SCD).
- Device Architecture: A dual-gate Field-Effect Transistor (FET) structure was used to separately control charge- and valley-currents.
- Material Platform: Ultra-pure CVD-grown SCD (001) plates were utilized, leveraging diamondâs exceptionally stable valley states.
- Electron Generation: Valley-polarized electrons were generated using short UV laser pulses (213 nm, 800 ps FWHM).
- Quantum Application: The controlled valley-currents were used to demonstrate local charge-state modulation of near-surface Nitrogen-Vacancy (NV) centers, observed via electroluminescence (EL).
- Purity Requirement: The material required extremely low impurity concentrations (N < 1013 cm-3; ionized impurities < 1010 cm-3) to minimize scattering and maintain valley pseudospin stability.
- Significance: Establishes a scalable, solid-state platform for valleytronic information processing and electrical pumping of diamond color centers.
Technical Specifications
Section titled âTechnical SpecificationsâThe following hard data points were extracted from the research paper detailing the material and operational parameters:
| Parameter | Value | Unit | Context |
|---|---|---|---|
| Diamond Material Type | Ultra-pure SCD (001) | N/A | Freestanding, CVD synthesized |
| Nitrogen Concentration (N) | < 1013 | cm-3 | Dominant impurity concentration |
| Ionized Impurity Conc. | < 1010 | cm-3 | Required for minimized scattering |
| Substrate Dimensions | 4.5 x 4.5 | mm | Plate size |
| Substrate Thickness | 390 to 510 | ”m | CVD growth thickness |
| Dielectric Layer | 30 nm Al2O3 | N/A | Deposited via ALD at 300 °C |
| Front Metalization | Ti/Al (20 nm/300 nm) | N/A | Source, Gate, and Drain contacts |
| Back Metalization | 10 nm Au | N/A | Optically semitransparent back contact |
| Excitation Wavelength | 213 | nm | UV pulse for electron generation |
| Pulse Duration (FWHM) | 800 | ps | Used for time-resolved current measurements |
| 14N Implantation Energy (Max) | 90 | keV | For near-surface NV creation |
| Annealing Temperature | 800 | °C | Post-implantation NV activation |
| Operating Temperature (EL) | 78 | K | Cryogenic temperature for EL observation |
| NV0 Zero Phonon Line (ZPL) | 575 | nm | Characteristic luminescence peak |
Key Methodologies
Section titled âKey MethodologiesâThe experimental success relied on precise material preparation and advanced device fabrication techniques:
- Material Selection: Freestanding, ultra-pure Single Crystal Diamond (SCD) (001) plates were chosen to ensure minimal impurity scattering and high carrier mobility.
- NV Center Engineering: Near-surface NV centers were created by room-temperature ion implantation of 14N at three distinct energy levels (30, 60, and 90 keV) to achieve a desired depth profile, followed by a 2-hour anneal at 800 °C.
- Dielectric Deposition: A 30 nm thick Aluminum Oxide (Al2O3) layer was deposited on the oxygen-terminated diamond surface using Atomic Layer Deposition (ALD) at 300 °C, serving as the gate dielectric.
- Contact Patterning: Standard lithographic techniques and Hydrofluoric (HF) etching were used to open windows in the oxide layer for source and drain contacts.
- Metalization: Front-side contacts (Source, Gate, Drain) were metallized using Ti/Al (20 nm/300 nm) evaporation. The back (001) surface was coated with 10 nm Au to provide a semitransparent back contact.
- Measurement: The device was mounted in a vacuum cryostat (78 K) and excited by a 213 nm pulsed laser. Time-resolved current measurements and electroluminescence (EL) spectroscopy were performed to analyze valley transport and NV charge state modulation.
6CCVD Solutions & Capabilities
Section titled â6CCVD Solutions & CapabilitiesâThe research on the valleytronic diamond transistor highlights the critical need for ultra-high purity, precisely engineered SCD substrates and advanced fabrication servicesâall core competencies of 6CCVD.
Applicable Materials for Replication and Extension
Section titled âApplicable Materials for Replication and ExtensionâTo replicate or extend this research into scalable quantum devices, 6CCVD recommends the following materials from our catalog:
| Application Requirement | 6CCVD Material Recommendation | Technical Specification Match |
|---|---|---|
| High-Purity Substrate | Optical Grade Single Crystal Diamond (SCD) | Nitrogen concentration routinely supplied < 5 x 1012 cm-3, exceeding the paperâs requirement (< 1013 cm-3). |
| NV Center Precursor | Isotopically Purified SCD (12C) | Provides the lowest spin noise environment for maximizing NV coherence time, critical for quantum computing applications. |
| Substrate Dimensions | Custom SCD Plates (001 Orientation) | Available in thicknesses from 0.1 ”m up to 500 ”m, and substrates up to 10 mm thick. Custom laser cutting ensures precise 4.5 x 4.5 mm dimensions or larger, up to 125 mm (PCD). |
Customization Potential for Device Scaling
Section titled âCustomization Potential for Device ScalingâThe dual-gate FET structure requires precise material handling and custom integration, which 6CCVD is uniquely positioned to provide:
- Custom Metalization Services: The paper utilized Ti/Al and Au contacts. 6CCVD offers internal metalization capabilities for Au, Pt, Pd, Ti, W, and Cu. We can deposit complex, multi-layer stacks (e.g., Ti/Al/Au) to ensure low-resistance ohmic contacts and reliable gate performance, streamlining the customerâs fabrication process.
- Ultra-Low Roughness Polishing: The performance of the FET relies heavily on the quality of the diamond/dielectric interface. 6CCVD guarantees Ra < 1 nm polishing for SCD, ensuring the necessary surface flatness for uniform ALD deposition of the Al2O3 dielectric layer.
- Ion Implantation Support: While 6CCVD does not perform implantation, we provide pre-characterized SCD substrates optimized for post-processing steps like high-energy ion implantation and subsequent high-temperature annealing (800 °C) for NV center creation.
Engineering Support
Section titled âEngineering Supportâ6CCVDâs in-house PhD team specializes in diamond material science and quantum applications. We can assist researchers with similar valleytronic, quantum sensing, or single-photon source projects by providing:
- Material Selection Consultation: Guidance on optimizing nitrogen concentration and isotopic purity for specific NV center applications (e.g., high-density NV layers vs. single, shallow NV centers).
- Interface Engineering: Expertise in surface termination (oxygen, hydrogen) necessary for optimal dielectric deposition and charge transport control in FET devices.
- Global Logistics: Reliable global shipping (DDU default, DDP available) ensures rapid delivery of sensitive materials worldwide.
For custom specifications or material consultation, visit 6ccvd.com or contact our engineering team directly.
View Original Abstract
The valley degree of freedom in many-valley semiconductors provides a new paradigm for storing and processing information in valleytronic and quantum-computing applications. Achieving practical devices requires all-electric control of long-lived valley-polarized states, without the use of strong external magnetic fields. Because of the extreme strength of the carbon-carbon bond, diamond possesses exceptionally stable valley states that provide a useful platform for valleytronic devices. Using ultrapure single-crystalline diamond, we demonstrate electrostatic control of valley currents in a dual-gate field-effect transistor, where the electrons are generated with a short ultraviolet pulse. The charge current and the valley current measured at the receiving electrodes are controlled separately by varying the gate voltages. We propose a model to interpret experimental data, based on drift-diffusion equations coupled through rate terms, with the rates computed by microscopic Monte Carlo simulations. As an application, we demonstrate valley-current charge-state modulation of nitrogen-vacancy centers.