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Performance of hydrogenated diamond MISFET using Zr-Si-N as the dielectric layer

MetadataDetails
Publication Date2017-08-14
JournalMRS Advances
AuthorsPengfei Zhang, Shufang Yan, Wei Wang, Shujia Zhang, Yanfeng Wang
InstitutionsInner Mongolia University of Technology, Xi’an Jiaotong University
Citations1
AnalysisFull AI Review Included

Technical Documentation & Analysis: High-Performance Diamond MISFETs

Section titled “Technical Documentation & Analysis: High-Performance Diamond MISFETs”

This research successfully demonstrates a high-performance, hydrogen-terminated (H-terminated) diamond Metal-Insulator-Semiconductor Field-Effect Transistor (MISFET) utilizing a sputtered Zirconium-Silicon-Nitride (Zr-Si-N) layer as the gate dielectric. This approach effectively stabilizes the critical two-dimensional hole gas (2DHG) channel, a major challenge in H-diamond electronics.

Key findings and material requirements include:

  • 2DHG Stabilization: The Zr-Si-N dielectric successfully passivates the H-terminated diamond surface, preventing oxidation and preserving the p-type surface conduction channel.
  • High Performance: The resulting MISFET exhibits excellent electrical characteristics, including a high maximum transconductance (1.27 mS/mm) and a large on/off ratio (106).
  • Material Quality: The device relies on high-quality, [100]-oriented Single Crystal Diamond (SCD) grown via Microwave Plasma Chemical Vapor Deposition (MPCVD).
  • Depletion Mode Operation: The device operates in normally-on depletion mode, confirming the presence of the 2DHG at the dielectric/diamond interface.
  • Custom Metalization: The fabrication process required precise patterning and deposition of Palladium (Pd) for source/drain and Tungsten (W) for the gate electrode.

The following hard data points were extracted from the device characterization at room temperature (RT):

ParameterValueUnitContext
Substrate MaterialIIa CVD SCDN/A[100]-oriented
Substrate Dimensions3 x 3 x 0.5mmÂłStarting material size
Dielectric Thickness25nmZr-Si-N layer
Threshold Voltage (VTH)3.0VNormally-on depletion mode
Max Transconductance (Gm,max)1.27mS/mmMeasured at VDS = -15V
Max Drain Current (IDS,max)-5.16mA/mmMeasured at VGS = -3V
On/Off Ratio106N/ABetween VGS = -3V and 4V
Maximum Capacitance (Cox,max)0.275”F/cmÂČExtracted from C-V curve
Dielectric Constant (Δr)7.8N/ACalculated from Cox,max
Effective Mobility (”eff)10.91cmÂČ/(V·s)Calculated from RON fitting
Raman FWHM (Quality)4.9cm-1Peak at 1333.7 cm-1
XRD Rocking Curve FWHM0.0093°High quality epitaxial layer

The fabrication of the high-quality SCD epitaxial layer and subsequent MISFET structure involved precise MPCVD growth and advanced deposition techniques:

  1. Substrate Preparation: [100]-oriented IIa CVD SCD substrates were cleaned using alkali and hot-acid treatments to remove non-diamond phases and metal ions.
  2. MPCVD Epitaxial Growth:
    • Reactor: 1.5 KW AsteX 5200 MPCVD system.
    • Gases: Purified H₂ diluted with 1% CH₄.
    • Total Flow Rate: 500 sccm.
    • Substrate Temperature: 900 °C.
    • Microwave Power: 1 kW.
    • Process Pressure: 100 Torr.
  3. 2DHG Channel Generation: Post-growth, samples were kept in H-plasma for 10 minutes and then cooled down to generate the H-terminated surface and the 2DHG channel.
  4. Source/Drain Metalization: Palladium (Pd) films were deposited directly onto the H-terminated surface via electron beam evaporation, followed by photolithography patterning.
  5. Dielectric Deposition: A 25 nm thick Zr-Si-N layer was deposited as the insulator using Radio Frequency Magnetron Sputtering with a Zr-Si-N target.
    • RF Power: 60 W.
    • Chamber Pressure: 1.8 x 10-1 Pa.
  6. Gate Metalization: Tungsten (W) metal film was patterned on the Zr-Si-N layer using standard photolithography and sputtering processes.

The successful replication and scaling of this high-performance diamond MISFET technology require ultra-high quality SCD substrates and precise material processing capabilities—services that are core to 6CCVD’s expertise.

To achieve the high material quality (XRD FWHM of 0.0093°) necessary for stable 2DHG formation, researchers require the highest grade of SCD.

6CCVD Material RecommendationDescription & ApplicationRelevance to Paper
Electronic Grade SCD (Single Crystal Diamond)Ultra-low defect density, [100]-oriented, high purity (IIa equivalent). Ideal for high-frequency and high-power electronics.Directly matches the high-quality CVD SCD substrate used for epitaxial growth and 2DHG formation.
Custom SCD SubstratesThicknesses from 0.1 ”m (epi-layer) up to 500 ”m (substrate).6CCVD can supply the exact 0.5 mm thick substrates used, or thicker/thinner custom wafers as required for thermal management or specific device architectures.
Polished SCD WafersPolishing to Ra < 1 nm surface roughness.Essential for ensuring optimal H-termination and minimizing interface scattering losses at the Zr-Si-N/Diamond interface, crucial for maximizing ”eff.

6CCVD’s in-house capabilities directly address the complex fabrication steps detailed in this research, enabling rapid prototyping and scaling for advanced diamond electronics.

  • Custom Dimensions and Scaling:
    • The paper used small 3x3 mmÂČ samples. 6CCVD can supply custom SCD plates and PCD wafers up to 125 mm in diameter, facilitating the transition from research prototypes to commercial-scale fabrication.
  • Advanced Metalization Services:
    • The device required Palladium (Pd) for ohmic contacts and Tungsten (W) for the gate. 6CCVD offers internal metalization capabilities for both:
      • Source/Drain: Custom deposition of Pd (as used in this study), Au, Ti, or Pt for low-resistance ohmic contacts on H-terminated surfaces.
      • Gate Electrode: Deposition of W (as used in this study) or other refractory metals (Ti, Pt) for gate structures.
  • Engineering Support for 2DHG Devices:
    • 6CCVD’s in-house PhD team specializes in MPCVD growth recipes and material selection for high-frequency and high-power applications, including H-terminated diamond FETs. We provide consultation on optimizing substrate orientation, surface termination (H-termination), and epitaxial layer thickness for specific MISFET and MESFET projects.
  • Global Supply Chain:
    • We offer reliable, global shipping (DDU default, DDP available) to ensure researchers worldwide receive their custom diamond materials quickly and securely.

For custom specifications or material consultation, visit 6ccvd.com or contact our engineering team directly.