RF Operation of Hydrogen-Terminated Diamond Field Effect Transistors - A Comparative Study

At a Glance

Metadata	Details
Publication Date	2015-02-20
Journal	IEEE Transactions on Electron Devices
Authors	Stephen Russell, Salah Sharabi, Alexandre Tallaire, David A. J. Moran
Institutions	University of Glasgow, Université Sorbonne Paris Nord
Citations	38
Analysis	Full AI Review Included

Technical Analysis & Documentation: RF Operation of Hydrogen-Terminated Diamond Field Effect Transistors

Executive Summary

This study demonstrates the highest cutoff frequency ($f_T$) achieved for diamond-based field-effect transistors (FETs) to date, confirming the viability of homoepitaxial Single Crystal Diamond (SCD) for high-frequency RF power applications.

Record High Frequency: An extrinsic cutoff frequency ($f_T$) of 53 GHz was achieved on a hydrogen-terminated diamond FET with a 50 nm gate length ($L_g$).
Material Foundation: Devices were fabricated on high-quality, (001)-oriented homoepitaxial SCD exhibiting ultra-low surface roughness ($<0.2$ nm rms) and a measured hole mobility of 69 cm²/V·s.
Device Scaling Benefits: Scaling the gate length from 250 nm down to 50 nm successfully increased $f_T$ from 19 GHz to 53 GHz.
Performance Bottleneck Identified: At the shortest $L_g$ (50 nm), the extrinsic performance was heavily limited by high access resistance ($R_s$, $R_d$) and parasitic elements, preventing the full realization of the intrinsic potential ($f_{T, \text{intrinsic}}$ calculated at 90 GHz).
Fabrication Limitations: The use of an Au sacrificial layer and wet etching for defining ohmic contacts resulted in rough contact edges, contributing significantly to the limiting access resistance.
Path Forward: Future improvements require advanced fabrication techniques—including ultra-smooth ohmic contacts, precise surface passivation ($\text{Al}_2\text{O}_3$, $\text{MoO}_3$), and potentially thicker gate metalization—to mitigate parasitic elements.

Technical Specifications

Data extracted from the comparative study of 250 nm, 120 nm, and 50 nm gate length devices.

Parameter	Value	Unit	Context / Device
Substrate Orientation	(001)	N/A	Homoepitaxial Single Crystal Diamond
Surface Roughness ($R_a$)	<0.2	nm (rms)	Measured via AFM after H-termination
Hole Mobility	69	cm²/V·s	Measured via Hall measurement
Sheet Resistance ($R_{sh}$)	~11	kΩ/sq	Extracted from TLM
Contact Resistance ($R_c$)	5	Ω·mm	Extracted from TLM (Au ohmic contact)
Gate Length ($L_g$) Tested	250, 120, 50	nm	Three distinct FET designs
Peak Extrinsic $f_T$	53	GHz	50 nm $L_g$ device
Peak Extrinsic $f_{MAX}$	27	GHz	50 nm $L_g$ device
Peak Intrinsic $f_T$	90	GHz	Theoretical value for 50 nm $L_g$ device
Maximum Saturation Current ($I_{ds, \text{sat}}$)	-360	mA/mm	120 nm $L_g$ device (at $V_{gs} = -2 \text{V}$)
Threshold Voltage ($V_{th}$)	+4	V	50 nm $L_g$ device (Enhanced positive shift observed)
Peak Transconductance ($g_m$)	137	mS/mm	120 nm $L_g$ device
Intrinsic Channel Resistance ($R_i$)	27.20	Ω	50 nm $L_g$ device
Gate Metal Stack	Al (25 nm) / Au (25 nm)	N/A	Deposited via lift-off

Key Methodologies

The following process steps were critical to the fabrication of the hydrogen-terminated diamond FETs:

Substrate Preparation: Initial surface cleaning performed using boiling aqua regia followed by $\text{H}_2\text{SO}_4/\text{HNO}_3$ to remove non-diamond carbon contaminants.
Hydrogen Termination (Surface Transfer Doping - STD): The substrate was exposed to hydrogen plasma for 30 minutes at a temperature of $580$ °C to induce the quasi-2D hole gas (2DHG).
Sacrificial Layer (SL) Deposition: An 80 nm thick layer of Au was deposited to protect the H-terminated surface during processing and simultaneously form the initial Ohmic contact.
Electron Beam Lithography (EBL): A three-mask EBL process was utilized for high-resolution patterning, including alignment markers and the defining of sub-300-nm gate structures.
Isolation Etch: Isolation regions were defined using a selective wet etch ($\text{KI}/\text{I}_2$ solution) to remove the sacrificial Au layer, followed by an $O_2$ plasma exposure to remove H-termination and form insulating (oxygen-terminated) diamond.
Ohmic Contact Definition: The source/drain gaps and Au ohmic contacts were simultaneously defined using the Au wet etch (KI/I₂), which resulted in intentional undercutting of the resist profile.
Gate Metal Deposition: Al (25 nm) / Au (25 nm) stack was deposited and lifted off to form the dual-finger gate (2 x 25 µm) across the three varying gate lengths ($L_g$).
RF Characterization: S-parameter measurements were conducted between 1 and 20 GHz. A two-step deembedding procedure using fabricated open and short structures was applied to remove parasitic contributions from the measurement pads.

6CCVD Solutions & Capabilities

6CCVD provides the specialized CVD diamond materials and advanced fabrication services necessary to replicate, optimize, and extend the high-performance RF research detailed in this paper, specifically targeting the reduction of parasitic resistance and enhancement of device reliability.

Applicable Materials for Replication and Optimization

To achieve the best results in high-frequency hydrogen-terminated diamond FETs, researchers require ultra-high quality material with exceptional crystal homogeneity and low surface defects.

Material Requirement (Paper)	6CCVD Solution (Recommendation)	Optimization Benefit
High-Quality Homoepitaxial (001)	Optical Grade Single Crystal Diamond (SCD)	Guarantees low defects, high purity, and consistent crystalline structure required for superior 2DHG formation and high mobility (Paper used 69 cm²/V·s).
Low Surface Roughness ($<0.2$ nm)	Precision Polished SCD Wafers	SCD polishing services achieve $R_a < 1 \text{nm}$. While the paper achieved $<0.2$ nm post-termination, 6CCVD starting material ensures optimal pre-processing flatness for EBL accuracy.
Improved Thermal Management (Future Power Scaling)	Thick SCD Substrates (up to 10 mm)	Diamond’s unparalleled thermal conductivity ($>20 \text{W/cm} \cdot \text{K}$) is crucial for RF power devices. 6CCVD can supply substrates up to 10 mm thick for superior heat sinking.
Stable P-Type Doping (Alternative to H-Term STD)	Boron-Doped Polycrystalline Diamond (BDD)	For applications demanding greater stability and reliability than Surface Transfer Doping (STD), 6CCVD offers BDD thin films and substrates for stable bulk p-type conductivity.

Customization Potential Addressing Parasitic Limitations

The paper identified that performance at 50 nm was dominated by access resistance linked to rough ohmic contacts and the need for thicker gate metallization. 6CCVD’s engineering capabilities directly address these weaknesses.

Precision Polishing for Contact Uniformity: 6CCVD guarantees surface roughness $R_a < 1 \text{nm}$ (SCD) and $R_a < 5 \text{nm}$ (Inch-size PCD). Starting with an ultra-smooth substrate minimizes line-edge roughness transfer during lithography and etching, leading to more uniform ohmic contacts and reduced access resistance.
Custom Dimensions and Wafer Size: While the paper used a $4.7 \times 4.7 \text{mm}$ coupon, 6CCVD supports scaling efforts by providing custom dimensions for plates and wafers up to 125 mm (PCD) or large-area SCD mosaics.
Custom Metallization Stacks: The paper used Al/Au (25 nm/25 nm) for the gate, noting that thicker metallization might be needed. 6CCVD offers in-house deposition of standard and custom metal stacks, including:
- Refractory Metals (Ti, W): Ideal for robust, high-temperature ohmic contacts or gates.
- High-Conductivity Metals (Au, Pt, Cu): Essential for minimizing RF loss and enabling thicker gate structures to reduce $R_g$ (Gate Resistance).

Engineering Support

6CCVD’s in-house PhD-level engineering team provides specialized consultation to overcome device limitations observed in advanced FETs.

Access Resistance Reduction: We assist in selecting optimal metal/diamond interface materials and fabrication recipes to minimize contact resistance, a critical requirement for scaling diamond FETs to $L_g < 50 \text{nm}$.
Material Selection for RF Projects: Our experts provide guidance on selecting the appropriate diamond grade (SCD, PCD, BDD) and thickness (0.1 µm up to 10 mm) tailored specifically for high-frequency (HF) and radio-frequency (RF) power electronics applications.
Process Integration Support: We support material compatibility analysis for advanced passivation layers (like $\text{Al}_2\text{O}_3$ and $\text{MoO}_3$) necessary for stabilizing the surface conductivity in H-terminated devices, as suggested by the research paper for improved device reliability.

For custom specifications or material consultation, visit 6ccvd.com or contact our engineering team directly.

View Original Abstract

Three sets of different gate-length field-effect transistors (250, 120, and 50 nm) have been defined on homoepitaxial hydrogen-terminated diamond with the 50-nm device being the smallest gate length diamond transistor fabricated to date. DC- and small-signal RF measurements were undertaken to compare the operation of these gate nodes. RF small-signal equivalent circuits were generated to contrast individual components and better understand the operation at various gate dimensions. Scaling the gate length to smaller dimensions leads to an increase in the cutoff frequency of these devices although parasitic elements are found to dominate at the shortest gate length of 50 nm, limiting the outstanding potential of these devices.

Tech Support

Original Source

DOI: https://doi.org/10.1109/ted.2015.2392798